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STA015 View Datasheet(PDF) - STMicroelectronics

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Description
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STA015 Datasheet PDF : 44 Pages
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STA015-STA015B-STA015T
PCMCONF
Address: 0x55 (85)
Type: R/W
Software Reset: 0x21
Hardware Reset: 0x21
MSB
b7
b6
b5
X
ORD DIF
X
1
X
0
X
0
X
1
X
X
X
X
X
X
X
X
X
X
LSB
b4
b3
b2
b1
b0
Description
INV FOR SCL PREC (1) PREC (1)
PCM order the LS bit is transmitted First
PCM order the MS bit is transmitted First
The word is right aligned
The word is left aligned
0
LRCKT Polarity compliant to I2S format
1
LRCKT Polarity inverted
0
I2S format
1
Different formats
1
Data are sent on the rising edge of SCKT
0
Data are sent on the falling edge of SCKT
0
0
16 bit mode (16 slots transmitted)
0
1
18 bit mode (32 slots transmitted)
1
0
20 bit mode (32 slots transmitted)
1
1
24 bit mode (32 slots transmitted)
PCMCONF is used to set the PCM Output Inter-
face configuration:
ORD: PCM order. If this bit is set to’1’, the LS Bit
is transmitted first, otherwise MS Bit is transmiited
first.
DIF: PCM_DIFF. It is used to select the position
of the valid data into the transmitted word. This
setting is significant only in 18/20/24 bit/word
mode.If it is set to ’0’ the word is right-padded,
otherwise it is left-padded.
INV (fig.13): It is used to select the LRCKT clock
polarity. If it is set to ’0’ the polarity is compliant to
I2S format (low -> left , high -> right), otherwise
the LRCKT is inverted. The default value is ’0’. (if
I2S have to be selected, must be set to ’0’ in the
STA015 configuration phase).
Figure 19. LRCKT Polarity Selection
LRCKT
LEFT
RIGHT
LEFT
INV_LRCLK=1
LRCKT
LEFT
RIGHT
LEFT
INV_LRCLK=0
D00AU1192
FOR: FORMAT is used to select the PCM Output
Interface format.
After hw and sw reset the value is set to 0 corre-
sponding to I2S format.
SCL (fig.14): used to select the Transmitter Serial
Clock polarity. If set to ’1’ the data are sent on the
rising edge of SCKT and sampled on the falling. If
set to ’0’ , the data are sent on the falling edge
and sampled on the rising. This last option is the
most commonly used by the commercial DACs.
The default configuration for this flag is ’0’.
Figure 20. SCKT Polarity Selection
SCKT
SDO
INV_SCLK=0
SCKT
SDO
INV_SCLK=1
PREC [1:0]: PCM PRECISION
It is used to select the PCM samples precision, as
follows:
’00’: 16 bit mode (16 slots transmitted)
’01’: 18 bit mode (32 slots transmitted)
’10’: 20 bit mode (32 slots transmitted)
’11’: 24 bit mode (32 slots transmitted)
The PCM samples precision in STA015 can be
16 or 18-20-24 bits.
When STA015 operates in 16 (18-20-24) bits
mode, the number of bits transmitted during a
LRCKT period is 32 (64).
25/44
 

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