CL3256A View Datasheet(PDF) - Clear Logic

Part Name

Description

View to exact match

CL3256A

Laser Processed Logic Device Family

Clear Logic 

AC Test Conditions

CL3256A Laser Processed Logic Devices

(A)

VCCIO

464 Ω

OUTPUT

35 pF

Includes jig

capacitance

250 Ω

(B)

VCCIO

464 Ω

OUTPUT

5 pF

Includes jig

capacitance

250 Ω

All Input Pulses

3.0V

90%

90%

GND 10%

≤ 3ns

10%

≤ 3ns

3K drw 02

Notes to Tables

1. During transitions, inputs may undershoot to -2.0V for periods shorter than

20ns. Otherwise, minimum DC input voltage is 0.3V.

2. Typical values are at VCC of 5.0 volts and ambient temperature of 25 ºC.

3. Guaranteed but not tested. Characterized initially, and after any design

changes which may affect these parameters.

4. Internal timing delays are based on characterization, and cannot be explicitly

tested. Internal timing parameters should be used for performance estimation

only.

Revision History

20 Oct. 2000:

1 Dec. 2000:

Created preliminary document.

Updated application note reference.

Page 13

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