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ISL80136 View Datasheet(PDF) - Renesas Electronics

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ISL80136 Datasheet PDF : 10 Pages
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ISL80136
Functional Description
Functional Overview
The ISL80136 is a high performance, high voltage, low-dropout
regulator (LDO) with 50mA sourcing capability. The part is rated
to operate across the -40°C to +125°C temperature range.
Featuring ultra-low quiescent current, it makes an ideal choice
for “always-on” applications. It works well under a “load dump
condition” where the input voltage could rise up to 40V. The
device also features current limit and thermal shutdown
protection.
Enable Control
The ISL80136 features an Enable pin. When it is pulled low, the
IC goes into shutdown mode. In this condition, the device draws
less than 2µA. Driving the pin high turns the device on. For
always on operation, the EN pin can be tied directly to IN.
Current Limit Protection
The ISL80136 has internal current limit functionality to protect
the regulator during fault conditions. During current limit, the
output sources a fixed amount of current largely independent of
the output voltage. If the short or overload is removed from VOUT,
the output returns to normal voltage regulation mode.
Thermal Fault Protection
In the event that the die temperature exceeds typically +165°C,
the output of the LDO will shut down until the die temperature
cools down to typically +145°C. The level of power dissipated,
combined with the ambient temperature and the thermal
impedance of the package, will determine if the junction
temperature exceeds the thermal shutdown temperature. Also
see the section on “Power Dissipation”.
Application Information
Input and Output Capacitors
For the output, a ceramic capacitor (X5R or X7R) with a
capacitance of 10µF is recommended for the ISL80136 to
maintain stability. The ground connection of the output capacitor
should be routed directly to the GND pin of the device and also
placed close to the IC. A minimum of 0.1µF (X5R or X7R) is
recommended at the input.
Output Voltage Setting
The output voltage is programmed using an external resistor
divider, as shown in Figure 14.
CIN
0.1µF
IN
OUT
R1
EN
ADJ
(ISL80136)
R2
GND
COUT
10µF
FIGURE 14. SETTING OUTPUT VOLTAGE
The output voltage is calculated using Equation 1:
VOUT
=
1.223 V
RR-----12--
+
1
(EQ. 1)
Power Dissipation
The junction temperature must not exceed the range specified in
“Recommended Operating Conditions” on page 4. The power
dissipation can be calculated using Equation 2:
PD = VIN VOUT  IOUT + VIN IGND
(EQ. 2)
The maximum allowable junction temperature, TJ(MAX) and the
maximum expected ambient temperature, TA(MAX) will determine
the maximum allowable junction temperature rise (TJ), as shown
in Equation 3:
TJ = TJMAXTAMAX
(EQ. 3)
To calculate the maximum ambient operating temperature, use
the junction-to-ambient thermal resistance (JA), as shown in
Equation 4:
TJMAX= PDMAXx JA + TA
(EQ. 4)
Board Layout Recommendations
A good PCB layout is important to achieve expected
performance. Consideration should be taken when placing the
components and routing the trace to minimize the ground
impedance, and keep the parasitic inductance low. The input and
output capacitors should have a good ground connection and be
placed as close to the IC as possible. The ADJ feedback trace
should be away from other noisy traces. Connect the exposed
pad to the ground plane using as many vias as possible within
the pad for the best thermal relief.
FN7970 Rev 2.00
August 11, 2015
Page 8 of 10
 

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