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KSZ8765CLX-EVAL View Datasheet(PDF) - Micrel

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Description
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KSZ8765CLX-EVAL Datasheet PDF : 153 Pages
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Micrel, Inc.
KSZ8765CLX
I/O pin strapping facility to set certain register bits from
I/O pins during reset time
Control registers configurable on-the-fly
Power and Power Management
Full-chip software power down (all registers value are
not saved and strap-in value will re-strap after release of
the power down)
Per-port software power down
Energy detect power down (EDPD), which disables the
PHY transceiver when cables are removed
Supports IEEE P802.3az energy-efficient Ethernet to
reduce power consumption in transceivers in LPI state
even though cables are not removed
Dynamic clock tree control to reduce clocking in areas
not in use
Low power consumption without extra power
consumption on transformers
Voltages: Using external LDO power supplies.
Analog VDDAT 3.3V
VDDIO support 3.3V, 2.5V, and 1.8V
Low 1.2V voltage for analog and digital core power
Wake-on-LAN support with configurable packet control
Additional Features
Single 25MHz +50ppm reference clock requirement
Comprehensive programmable two LED indicator
support for link, activity, full/half duplex, and 10/100
speed
Packaging and Environmental
Commercial temperature range: 0°C to +70°C
Industrial temperature range: 40oC to +85oC
Package available in an 80-pin lead free (RoHS) LQFP
form factor
Supports HBM ESD rating of 5kV
0.065µm CMOS technology for lower power
consumption
Applications
Industrial Ethernet applications that employ IEEE 802.3-
compliant MACs (Ethernet/IP, Profinet, MODBUS TCP,
etc.)
VoIP phone
Set-top/game box
Automotive
Industrial control
IPTV POF
SOHO residential gateway with full wire speed of four
LAN ports
Broadband gateway/firewall/VPN
Integrated DSL/cable modem
Wireless LAN access point + gateway
Standalone 10/100 switch
Networked measurement and control systems
July 23, 2014
3
Revision 1.0
 

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