Micrel, Inc.
KSZ8765CLX
2. Configure the serial communication to SPI slave mode by pulling down pin SPIQ with a pull-down resistor.
3. Write configuration data to registers using a typical SPI write data cycle as shown in Figure 9 or SPI multiple write as
shown in Figure 10. Note that data input on SDA is registered on the rising edge of SCL clock.
4. Registers can be read and the configuration can be verified with a typical SPI read data cycle as shown in Figure 9 or
a multiple read as shown in Figure 10. Note that read data is registered out of SPIQ on the falling edge of SCL clock.
Figure 9. SPI Access Timing
July 23, 2014
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Revision 1.0