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TDA9113 View Datasheet(PDF) - STMicroelectronics

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TDA9113
generated from the output vertical deflection drive
waveform, they both track with real vertical ampli-
tude and position (including breathing compensa-
tion), thus being fixed on the screen. Refer to I2C
BUS CONTROL REGISTER MAP on page 22 for
details on I2C bus controls.
Figure 7. Horizontal timing diagram
H-sync
(polarized)
tHph
min max
PLL1 lock
REF1
(internal)
H-Osc
(VCO)
VHPosF
max.
med.
min.
VS(0)
7/8TH
TH
HPOS
(I2C)
max.
med.
min.
VHOThrHi
VHOThrLo
H-flyback
VThrHFly
PLL2
control
current
tS +
-
H-drive ON
ON
OFF
(on HOut)
H-drive
region
H-drive
region
000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000
tHoff
forced high
tph(max) 000000000000000000000000000000000000000000
forced low
0000000000000000000000
0000000000000000000000
0000000000000000000000
0000000000000000000000000000000000000
0000000000000000000000000000000000000
0000000000000000000000000000000000000
inhibited
tS: HOT storage time
Figure
8.HHFeFlyxlty.1i0000000000000000002nipntu. t
configuration
~500
~20k
GND
9.3.6 - Output Section
The H-drive signal is inhibited (high level) during
flyback pulse, and also when
X-ray protection is activated
(VXCRCaiysAtolaormlowI2,Cwhbeuns
flag set to 1) and when I2C bus bit HBOutEn is set
to 0 (default position).
The duty cycle of the H-drive signal is controlled
via I2C bus register HDUTY. This is overruled dur-
ing soft-start and soft-stop procedures (see sub
chapter Soft-start and soft-stop on H-drive on
page 30 and Figure 10).
The PLL2 is followed by a rapid phase shifting
which accepts the signal from H-moiré canceller
(see sub chapter Horizontal moiré cancellation on
page 30)
The output stage consists of a NPN bipolar tran-
sistor, the collector of which is routed to HOut pin
(see Figure 9).
Figure 9. HOut configuraintito.20000000000000n6eHxtO. ut
Non-conductive state of HOT (Horizontal Output
Transistor) must correspond to non-conductive
state of the device output transistor.
9.3.7 - Soft-start and soft-stop on H-drive
The soft-start and soft-stop procedure is carried
out at each switch-on or switch-off of the H-drive
signal, either via HBOutEn I2C bus bit or after re-
set of XRayAlarm I2C bus flag, to protect external
power components. By its second function, the ex-
ternal capacitor on pin HPosF is used to time out
this procedure, during which the duty cycle of H-
drive signal starts at its maximum (“tHoff/TH for soft
start/stop” in electrical specifications) and slowly
decreases to the value determined by the control
I2C bus register HDUTY (vice versa at soft-stop).
This is controlled by voltage on pin HPosF. See
Figure 10 and sub chapter Safety functions on
page 38.
9.3.8 - Horizontal moiré cancellation
The horizontal moiré canceller is intended to blur a
potential beat between the horizontal video pixel
period and the CRT pixel width, which causes vis-
ible moiré patterns in the picture.
It introduces a microscopic indent on horizontal
scan lines by injecting little controlled phase shifts
to output circuitry of the horizontal section. Their
amplitude is adjustable through HMOIRE I2C bus
control.
The behaviour of horizontal moiré is to be opti-
mised for different deflection design configurations
using HMoiré I2C bus bit. This bit is to be kept at 0
for common architecture (B+ and EHT common
30/50
 

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