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TDA9351PS/N2 View Datasheet(PDF) - Philips Electronics

Part Name
Description
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TDA9351PS/N2 Datasheet PDF : 118 Pages
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Philips Semiconductors
TV signal processor-Teletext decoder with
embedded µ-Controller
Tentative Device Specification
TDA935X/6X/8X PS/N2 series
SYMBOL
INSSW2
R2/VIN
G2/YIN
B2/UIN
BCLIN
BLKIN
RO
GO
BO
VDDA
VPE
VDDC
OSCGND
XTALIN
XTALOUT
RESET
VDDP
P1.0/INT1
P1.1/T0
P1.2/INT0
PIN
DESCRIPTION
45 2nd RGB / YUV insertion input
46 2nd R input / V (R-Y) input
47 2nd G input / Y input
48 2nd B input / U (B-Y) input
49 beam current limiter input / (V-guard input, note 2)
50 black current input / (V-guard input, note 2)
51 Red output
52 Green output
53 Blue output
54 analog supply of Teletext decoder and digital supply of TV-processor (3.3 V)
55 OTP Programming Voltage
56 digital supply to core (3.3 V)
57 oscillator ground supply
58 crystal oscillator input
59 crystal oscillator output
60 reset
61 digital supply to periphery (+3.3 V)
62 port 1.0 or external interrupt 1 input
63 port 1.1 or Counter/Timer 0 input
64 port 1.2 or external interrupt 0 input
Note
1. The function of pin 20, 28, 29, 31, 32, 35 and 44 is dependent on the IC version (mono intercarrier FM demodulator
/ QSS IF amplifier and East-West output or not) and on some software control bits. The valid combinations are given
in table 1.
2. The vertical guard function can be controlled via pin 49 or pin 50. The selction is made by means of the IVG bit in
subaddress 2BH.
Table 1 Pin functions for various versions
IC version
FM-PLL version
QSS version
East-West Y/N
N
Y
N
Y
CMB1/CMB0 bits 00 01/10/11
00
01/10/11 00
01/10/11
00
01/10/11
AM bit
0
1
0
1
Pin 20
AVL
EWD
AVL
EWD
Pin 28
AUDEEM
SIFIN1
Pin 29
DECSDEM
SIFIN2
Pin 31
Pin 32
SNDPLL
SNDIF(1) REFO(2) AVL/SNDIF(1) REFO(2) AMOUT
SIFAGC
REFO(2)
AMOUT
REFO(2)
Pin 35
AUDEXT
AUDEXT QSSO AMOUT AUDEXT QSSO AMOUT
Pin 44
AUDOUT
controlled AM or audio out
Note
1. When additional (external) selectivity is required for FM-PLL system pin 32 can be used as sound IF input. This
function is selected by means of SIF bit in subaddress 28H.
2. The reference output signal is only available for the CMB1/CMB0 setting of 0/1. For the other settings this pin is a
switch output (see also table 67).
2001 Jan 18
9
 

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