R5F21143DSP View Datasheet(PDF) - Renesas Electronics

Part Name

Description

View to exact match

R5F21143DSP

R8C/14 Group, R8C/15 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Renesas Electronics 

REVISION HISTORY

R8C/14 Group, R8C/15 Group Hardware

Rev.

2.00

Date

Page

Description

Summary

Jan 12, 2006

76 11.4 Address Match Interrupt;

“... , do not use an address match interrupt in a user system.” →

“... , do not set an address match interrupt (the registers of AIER,

RMAD0, RMAD1 and the fixed vector tables) in a user system.”

revised

77 Figure 11.19 AIER, RMAD0 to RMAD1 Registers;

AIER Register revised

79 Figure 12.2 OFS and WDC Registers;

• Option Function Select Register NOTE1 revised, NOTE2 added

• Watchdog Timer Control Register NOTE1 deleted

83 Table 13.1 Functional Comparison of Timers;

“Decrement” → “Increment”

84 Figure 13.1 Block Diagram of Timer X revised

87 Table 13.2 Specification of Timer Mode;

• “INT1/CNTR0 Signal Pin Function” → “INT10/CNTR00, INT11/CNTR01

Pin Function” revised

• “• When writing ... registers (the data is transferred to the counter when

the following count source is input).”→

“• When writing ... registers at the following count source input and the

data is transferred to the counter at the second count source input and

the count re-starts at the third count source input.” revised

88 Table 13.3 Specification of Pulse Output Mode;

• “INT1/CNTR0 Signal Pin Function” → “INT10/CNTR00 Pin Function”

revised

• “• When writing ... registers (the data is transferred to the counter when

the following count source is input).”→

“• When writing ... registers at the following count source input and the

data is transferred to the counter at the second count source input and

the count re-starts at the third count source input.” revised

• NOTE1 added

90, 92, 95 Table 13.4 Specification of Event Counter Mode,

Table 13.5 Specification of Pulse Width Measurement Mode,

Table 13.6 Specification of Pulse Period Measurement Mode;

• “INT1/CNTR0 Signal Pin Function” → “INT10/CNTR00, INT11/CNTR01

Pin Function” revised

• “• When writing ... registers (the data is transferred to the counter when

the following count source is input).”→

“• When writing ... registers at the following count source input and the

data is transferred to the counter at the second count source input and

the count re-starts at the third count source input.” revised

98 Figure 13.11 Block Diagram of Timer Z;

“Peripheral Data Bus” → “Data Bus” revised

101 Figure 13.14 TZOC and PUM Registers;

Timer Z Output Control Register “Stops counting” → “One-shot stops”,

“Starts counting” → “One-shot starts” revised

C-7

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