R5F211A3DSP-U0 View Datasheet(PDF) - Renesas Electronics

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Description

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R5F211A3DSP-U0

RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER R8C FAMILY / R8C/1x SERIES

Renesas Electronics 

Table of Contents

SFR Page Reference

B-1

1. Overview

1

1.1 Applications .................................................................................................1

1.2 Performance Overview................................................................................2

1.3 Block Diagram .............................................................................................4

1.4 Product Information .....................................................................................5

1.5 Pin Assignments..........................................................................................9

1.6 Pin Functions.............................................................................................12

2. Central Processing Unit (CPU)

15

2.1 Data Registers (R0, R1, R2, and R3)........................................................16

2.2 Address Registers (A0 and A1).................................................................16

2.3 Frame Base Register (FB) ........................................................................16

2.4 Interrupt Table Register (INTB) .................................................................16

2.5 Program Counter (PC) ..............................................................................16

2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP).....................16

2.7 Static Base Register (SB)..........................................................................16

2.8 Flag Register (FLG)...................................................................................16

2.8.1 Carry Flag (C).....................................................................................16

2.8.2 Debug Flag (D) ...................................................................................16

2.8.3 Zero Flag (Z).......................................................................................16

2.8.4 Sign Flag (S).......................................................................................16

2.8.5 Register Bank Select Flag (B) ............................................................16

2.8.6 Overflow Flag (O) ...............................................................................16

2.8.7 Interrupt Enable Flag (I)......................................................................17

2.8.8 Stack Pointer Select Flag (U) .............................................................17

2.8.9 Processor Interrupt Priority Level (IPL) ..............................................17

2.8.10 Reserved Bit .......................................................................................17

3. Memory

18

3.1 R8C/1A Group...........................................................................................18

3.2 R8C/1B Group...........................................................................................19

A-1

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