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SDT823 View Datasheet(PDF) - Linear Technology

Part Name
Description
View to exact match
SDT823
Linear
Linear Technology Linear
SDT823 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
TTL or
CMOS
15 V
S
1 k
D
±5 V
G
SD5000
5V
SD5000
1 k
15 V
15 V
S
D
0 to 10 V
G
SD210
B
TTL
SD5000
S
D
0 to 10 V
G
15 V CMOS
SD210
B
D SD5000
S
D
-5 V
TTL
G
±10 V
S
15 V
-5 V
±5 V
-10 V
G
SD211
B
-10 V
Figure 13. Various DMOS Drivers
High-Speed Multiplexer
In a typical application, the circuit of Figure 14
is used to multiplex and sample-and-hold two
analog signals at a 5-MHz rate. Two of the
switches in an SD5000 are used as level
shifter/drivers to provide the gate drive of the
single-pole-double-throw arrangement formed
by switches 3 and 4. Capacitors C1 and C2
provide charge injection compensation.
Signal 1 is a 6-V, 156-kHz square wave. Signal
2 is a 2-Vpp, 78-kHz alternating waveform with
a dc offset of -3.4 V (Figure 15).
Figure 16 illustrates the resulting composite
waveform present at the holding capacitor along
with the gate 3 control signal.
As can be seen, the switching times are about 15
ns, the acquisition time is 80 ns, and the holding
time is about 90 ns. The total sample-and-hold
cycle takes 200 ns. Even though not
maximized, this speed is faster than what any
other presently available (50 ns) analog switch
products can achieve.
8
Linear Integrated Systems, Inc. 4042 Clipper Ct. Fremont, CA 94538 Tel: 510 490-9160 Fax: 510 353-0261
 

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