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29F64G08CBAAA View Datasheet(PDF) - Micron Technology

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29F64G08CBAAA
Micron
Micron Technology Micron
29F64G08CBAAA Datasheet PDF : 159 Pages
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Micron Confidential and Proprietary
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64Gb, 128Gb, 256Gb, 512Gb Asynchronous/Synchronous NAND
Bus Operation – Asynchronous Interface
driver enables multiple R/B# outputs to be OR-tied. Typically, R/B# is connected to an
interrupt pin on the system controller (see Figure 24 (page 34)).
The combination of Rp and capacitive loading of the R/B# circuit determines the rise
time of the R/B# signal. The actual value used for Rp depends on the system timing re-
quirements. Large values of Rp cause R/B# to be delayed significantly. Between the 10-
to 90-percent points on the R/B# waveform, the rise time is approximately two time
constants (TC).
TC = R × C
Where R = Rp (resistance of pull-up resistor), and C = total capacitive load.
The fall time of the R/B# signal is determined mainly by the output impedance of the
R/B# signal and the total load capacitance. Approximate Rp values using a circuit load
of 100pF are provided in Figure 29 (page 37).
The minimum value for Rp is determined by the output drive capability of the R/B#
signal, the output voltage swing, and Vccq.
Rp =
Vcc (MAX) - Vol
IOL + Σil
(MAX)
Where Σil is the sum of the input currents of all devices tied to the R/B# pin.
Figure 24: READ/BUSY# Open Drain
Vccq
Vcc
Rp
To controller
R/B#
Open drain output
IOL
Vss
Device
PDF: 09005aef83d2277a
Rev. A 11/09 EN
34
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2009 Micron Technology, Inc. All rights reserved.
 

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