MPC980 View Datasheet(PDF) - Motorola => Freescale
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MPC980 Datasheet PDF : 7 Pages
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MPC980
resonant mode. Therefore in the majority of cases a parallel
specified crystal can be used with the MPC980 with just a
minor frequency error due to the actual series resonant
frequency of the parallel resonant specified crystal. Typically
a parallel specified crystal used in a series resonant mode
will exhibit an Oscillatory frequency a few hundred ppm lower
than the specified value. For most processor implementa–
tions a few hundred ppm translates into kHz inaccuracies, a
level which does not represent a major issue.
Table 2. Crystal Specifications
Parameter
Value
Crystal Cut
Fundamental at Cut
Resonance
Series Resonance*
Frequency Tolerance
±75ppm at 25°C
Frequency/Temperature Stability
±150ppm 0 to 70°C
Operating Range
0 to 70°C
Shunt Capacitance
5–7pF
Equivalent Series Resistance (ESR) 50 to 80Ω Max
Correlation Drive Level
100µW
Aging
5ppm/Yr (First 3 Years)
* See accompanying text for series versus parallel resonant
discussion.
Power Supply Filtering
The MPC980 is a mixed analog/digital product and as
such it exhibits some sensitivities that would not necessarily
be seen on a fully digital product. Analog circuitry is naturally
susceptible to random noise, especially if this noise is seen
on the power supply pins. The MPC980 provides separate
power supplies for the output buffers (VCCO) and the
phase–locked loop (VCCA) of the device. The purpose of this
design technique is to try and isolate the high switching noise
digital outputs from the relatively sensitive internal analog
phase–locked loop. In a controlled environment such as an
evaluation board this level of isolation is sufficient. However,
in a digital system environment where it is more difficult to
minimize noise on the power supplies a second level of
isolation may be required. The simplest form of isolation is a
power supply filter on the VCCA pin for the MPC980.
Figure 3 illustrates a typical power supply filter scheme.
The MPC980 is most susceptible to noise with spectral
content in the 1KHz to 1MHz range. Therefore the filter
should be designed to target this range. The key parameter
that needs to be met in the final filter design is the DC voltage
drop that will be seen between the VCC supply and the VCCA
pin of the MPC980. From the data sheet the IVCCA current
(the current sourced per VCCA pin) is typically 15mA (20mA
maximum), assuming that a minimum of 3.0V must be
maintained on the VCCA pin very little DC voltage drop can
be tolerated when a 3.3V VCC supply is used. The resistor
shown in Figure 3 must have a resistance of 10–15Ω to meet
the voltage drop criteria. The RC filter pictured will provide a
broadband filter with approximately 100:1 attenuation for
noise whose spectral content is above 20KHz. As the noise
frequency crosses the series resonant point of an individual
capacitor it’s overall impedance begins to look inductive and
thus increases with increasing frequency. The parallel
capacitor combination shown ensures that a low impedance
path to ground exists for frequencies well above the
bandwidth of the PLL. It is recommended that the user start
with an 8–10Ω resistor to avoid potential VCC drop problems
and only move to the higher value resistors when a higher
level of attenuation is shown to be needed.
3.3V
RS=5–15Ω
PLL_VCC
MPC980
VCCA Pins 1 & 12
0.01µF
22µF
VCC
0.01µF
Figure 3. Power Supply Filter
Although the MPC980 has several design features to
minimize the susceptibility to power supply noise (isolated
power and grounds and fully differential PLL) there still may
be applications in which overall performance is being
degraded due to system power supply noise. The power
supply filter schemes discussed in this section should be
adequate to eliminate power supply noise related problems
in most designs.
Component Reliability Analysis Information
All inputs and outputs of the MPC980 clock generator are
LVCMOS and are not 5V tolerant. The quiescent current is
190mA maximum, so the maximum quiescent power is
(190mA) × (3.465V max–VCC) = 658.35mW. Total maximum
power must include the dynamic power of the outputs.
Dynamic Power/Output = [Logic Swing Out (volts)] ×
[VCC (volts)] × [Freq (MHz)] × [Cl + Cp (pF)]
where
CL = Load Capacitance
CP = Output Power Dissipation Capacitance
The MPC980 is packaged in a 52–lead LQFP to optimize
board space and power supply distribution. The LQFP
package occupies a 12mm x 12mm space on the PCB. The
52–Pin LQFP package has a ΘJA of 64 to 74°C/W in still air
and a ΘJA of 42 to 52°C/W in 500lfpm of moving air. The
maximum chip temperature for the device is 140°C. The
device component count is: NPN Bipolar devices 2,238;
NMOS devices 1,313; PMOS devices 281.
ECLinPS and ECLinPS Lite
5
DL140 — Rev 3
MOTOROLA
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