A second source that can trigger a reset is a brown out event. Whenever the integrated
brown out detector measures a voltage drop below the brown-out threshold on the digital
supply, the integrity of the stored data and configuration can no longer be guaranteed;
thus, a reset is generated. While the supply voltage stays between the brown out and the
functional threshold of the chip, the NINT/NSTR pin is forced to low. When the supply
voltage drops below the functional threshold, the levels of all digital output pins (e.g.
NINT/NSTR) are undefined.
When the supply voltage rises above the brown out threshold, the IC generates a high
pulse at NINT/NSTR and remains in the reset state for the duration of tReset. When the
IC leaves the reset state, the Interrupt Status register (IS) is set to FFhex and the
NINT/NSTR pin is forced to low. Now, the IC starts operation in the Sleep Mode, ready
to receive commands via the SPI interface. The NINT/NSTR pin will go high, when the
Interrupt Status register is read the first time.
Version 4.0, 2007-06-01