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CXD2586R-1 View Datasheet(PDF) - Sony Semiconductor

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CXD2586R-1 Datasheet PDF : 127 Pages
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CXD2586R/-1
CD Digital Signal Processor with Built-in Digital Servo and DAC
For the availability of this product, please contact the sales office.
Description
The CXD2586R/-1 is a digital signal processor LSI
for CD players. This LSI incorporates the digital
servo, digital filter and 1-bit DAC.
144 pin LQFP (Plastic)
Features
All digital signal processing during playback is
performed with a single chip
Highly integrated mounting possible due to a built-
in RAM
Digital Signal Processor Block
Playback mode which supports CAV (Constant
Angular Velocity)
Frame jitter free
Half-speed to octuple-speed continuous playback
possible with a low external clock (only CXD2586R-1
supports up to octuple speed)
Allows relative rotational velocity readout
Wide capture range playback mode
Spindle rotational velocity following method
Supports normal-speed, double-speed, quadruple-
speed, sextuple-speed and octuple-speed playback
(only CXD2586R-1)
Wide frame jitter margin (±28 frames) due to a
built-in 32K RAM
The bit clock, which strobes the EFM signal, is
generated by the digital PLL
EFM data demodulation
Enhanced EFM frame sync signal protection
Refined super strategy-based powerful error correction
C1: double correction, C2: quadruple correction
Octuple-speed (only CXD2586R-1), sextuple-speed,
quadruple-speed and double-speed playback (digital
signal processor and digital servo blocks)
Noise reduction during track jumps
Auto zero-cross mute
Subcode demodulation and Sub Q data error detection
Digital spindle servo (with oversampling filter)
16-bit traverse counter
Asymmetry compensation circuit
CPU interface on serial bus
Error correction monitor signal, etc. output from a
new CPU interface
Servo auto sequencer
Fine search performs track jumps with high accuracy
Digital audio interface outputs
Digital level meter, peak meter
Bilingual compatible
Digital Servo Block
Microcomputer software-based flexible servo control
Servo error signal, offset cancel function
Servo loop, auto gain control function
E:F balance, focus bias adjustment function
Digital Filters (DAC and LPF blocks)
Low-pass filter for DAC
Digital de-emphasis
Digital attenuation
4fs oversampling filter
Adopts secondary ∆∑ noise shaper
LPF for DAC analog output
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
Supply voltage
VDD
–0.3 to +7.0 V
Input voltage
VI
–0.3 to +7.0 V
(VSS – 0.3V to VDD +0.3V)
Output voltage
VO
–0.3 to +7.0 V
Storage temperature Tstg
–40 to +125 °C
Supply voltage difference VSS – AVSS –0.3 to +0.3 V
VDD – AVDD –0.3 to +0.3 V
Recommended Operating Conditions
Supply voltage
Operating temperature
The VDD (min.) for the CXD2586R/-1 varies according
to the playback speed and built-in VCO selection. The
VDD (min.) is 4.5V when high-speed VCO and
quadruple-speed playback are selected (variable pitch
off). The VDD (min.) for the CXD2586R/-1 under
various conditions are as shown in the following table.
Playback
speed
VDD (min.) [V]
VCO1 high VCO1 normal DAC
speed
speed
block
×8
(only CXD2586R-1)
4.75
×6
4.50
×4
× 21
4.50
4.00
×2
× 12
3.40
4.00
3.40
3.40
×1
3.40
3.40
4.50
—: Dashes indicate that there is no assurance of the
processor operating. All values are for variable pitch off.
1 When the internal operation of the LSI is set to normal-
speed playback and the operating clock of the signal
processor is doubled, double-speed playback results.
2 When the internal operation of the LSI is set to double-
speed mode and the crystal oscillating frequency is
halved in low power consumption mode, normal-speed
playback results.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95Y01A65-ST
 

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