CXD2586R-1 View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

View to exact match

CXD2586R-1

CD Digital Signal Processor with Built-in Digital Servo and DAC

Sony Semiconductor 

CXD2586R/-1

[1] CPU Interface

§1-1. CPU Interface Timing

• CPU interface

This interface uses DATA, CLOK, and XLAT to set the modes.

The interface timing chart is shown below.

CLOK

750ns or more

DATA

XLAT

Registers

D18 D19 D20 D21 D22 D23

750ns or more

Valid

• The internal registers are initialized by a reset when XRST = 0.

§1-2. CPU Interface Command Table

Total bit length for each register

Register

0 to 2

3

4 to 6

7

8

9

A

B

C to D

E

Total bit length

8bit

8 to 24bit

16bit

20bit

24bit

20bit

28bit

20bit

16bit

20bit

– 15 –

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