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E-STLC2593 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
View to exact match
E-STLC2593
ST-Microelectronics
STMicroelectronics ST-Microelectronics
E-STLC2593 Datasheet PDF : 5 Pages
1 2 3 4 5
STLC2593
Overview
Low power consumption
– Ultra low power architecture with 3 different low-power levels
– Deep Sleep modes, including Host-power saving feature
– Dual Wake-up mechanism: initiated by the Host or by the Bluetooth device
Communication interfaces
– Fast UART up to 4 MHz
– Flexible SPI interface up to 13 MHz
– PCM interface
– Up to 10 additional flexibly programmable GPIOs
– External interrupts possible through the GPIOs
– Fast I2C interface as master
Clock support
– System clock input (digital or sine wave) at 9.6, 10, 13, 16, 16.8, 19.2, 26, 33.6 or
38.4 MHz
– Low power clock input at 32.768 kHz
ARM7TDMITM CPU
Memory organization
– On chip RAM, including provision for patches
– On chip ROM, preloaded with SW up to HCI
Ciphering support up to 128 bits key
Single power supply with internal regulators for core voltage generation
Supports 1.65 V to 2.85 V I/O systems
Auto calibration (VCO, Filters)
1.2
FM radio features
Worldwide FM band support (76-108 MHz)
RDS/RBDS processor
Line-level analog FM output
2-wire and 3-wire control interface
2.7 V to 5.5 V supply voltage
– Integrated LDO regulator allows direct connection to battery
32.768 kHz reference clock
– Frequency synthesizer with integrated VCO
Digital low-IF receiver
Signal strength measurement
Automatic Frequency Control (AFC)
Automatic Gain Control (AGC)
Excellent overload immunity
Adaptive noise suppression
3/5
 

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