datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

STA335MLJ View Datasheet(PDF) - STMicroelectronics

Part Name
Description
View to exact match
STA335MLJ Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
STA335ML
3.6
Power-on sequence
Figure 3. Power-on sequence
Electrical specifications
3.7
VCC
VDD_DIG
Don’t care
XTI
Don’t care
RESET
TR
PWRDN
TR = minimum time between XTI master clock stable and reset removal: 1 ms
Note 1: clock stable means: fmax - fmin < 1 MHz
Note 2: No specific VCC and VDD turn-on sequence is required.
Test circuits
Figure 4. Resistive load
Low current dead time = MAX(DTr,DTf)
Duty cycle = 50%
INxY
+Vcc
M58
OUTxY
M57
gnd
OUTxY
Vcc
(3/4)Vcc
(1/2)Vcc
(1/4)Vcc
t
DTr
DTf
R 8Ω
+ V67 =
-
vdc = Vcc/2
D03AU1458
Figure 5.
Test circuit
High current dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+VCC
Duty cycle=A
DTin(A)
INA
DTout(A)
Q1
OUTA
Iout
Q3
L67 22μ
C69
470nF
Rload=8Ω
C71 470nF
Q2
DTout(B)
OUTB
L68 22μ
Iout
C70
Q4
470nF
Duty cycle=B
DTin(B)
INB
Duty cycle A and B: Fixed to have DC output current of Iout in the direction shown in figure
D03AU1517_00
Doc ID 17638 Rev 4
9/20
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]