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STA333W View Datasheet(PDF) - STMicroelectronics

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STA333W Datasheet PDF : 49 Pages
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Register description
STA333W
Overcurrent warning detect adjustment bypass
Table 23. Overcurrent warning detect adjustment bypass
Bit
R/W RST
Name
Description
7
R/W 1
OCRB
0: overcurrent warning adjustment enabled
1: overcurrent warning adjustment disabled
6.1.4
The status bit OCWARN is used to warn of an overcurrent condition. When OCWARN is
asserted (set to 0), the power control block forces an adjustment to the modulation limit
(default -3dB) in an attempt to eliminate the overcurrent warning condition. Once the
overcurrent warning volume adjustment is applied, it remains applied until the device is
reset. The overcurrent limit can be changed via register OLIM (Output limit register (addr
0x34) on page 38).
Configuration register D (addr 0x03)
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
ZDE
Reserved
0
1
0
0
0
0
0
0
Zero-detect mute enable
Table 24. Zero detect mute enable
Bit
R/W RST
Name
Description
6
R/W 1
ZDE
1: enable the automatic zero-detect mute
Setting the ZDE bit enables the zero-detect automatic mute. The zero-detect circuit looks at
the data for each processing channel at the output of the crossover (bass management)
filter. If any channel receives 2048 consecutive zero value samples (regardless of fS) then
that individual channel is muted if this function is enabled.
6.1.5 Configuration register E (addr 0x04)
D7
SVE
1
D6
ZCE
1
D5
DCCV
0
D4
PWMS
0
D3
AME
0
D2
NSBW
0
D1
MPC
1
Max power correction variable
Table 25. Max power correction variable
Bit
R/W RST
Name
Description
0
R/W 0
MPCV
0: use standard MPC coefficient
1: use MPCC bits for MPC coefficient
D0
MPCV
0
28/49
Doc ID 13365 Rev 2
 

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