ST10F269Z1Q6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

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ST10F269Z1Q6

16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM

STMicroelectronics 

6 - CENTRAL PROCESSING UNIT (CPU)

ST10F269

The Table 5 shows the various combinations of pointer post-modification for each of these 2 new address-

ing modes. In this document the symbols “[Rwn⊗]” and “[IDXi⊗]” refer to these addressing modes.

Table 5 : Pointer Post-modification Combinations for IDXi and Rwn

Symbol

Mnemonic

Address Pointer Operation

“[IDXi⊗]” stands for

[IDXi]

(IDXi) ← (IDXi)

(no-op)

[IDXi+]

(IDXi) ← (IDXi) + 2

(i=0,1)

[IDXi-]

[IDXi + QXj]

(IDXi) ← (IDXi) - 2

(IDXi) ← (IDXi) + (QXj)

(i=0,1)

(i, j =0,1)

“[Rwn⊗]” stands for

[IDXi - QXj]

[Rwn]

[Rwn+]

[Rwn-]

[Rwn + QRj]

(IDXi) ← (IDXi) - (QXj)

(Rwn) ← (Rwn)

(Rwn) ← (Rwn) + 2

(Rwn) ← (Rwn) - 2

(Rwn) ← (Rwn) + (QRj)

(i, j =0,1)

(no-op)

(n=0-15)

(n=0-15)

(n=0-15; j =0,1)

[Rwn - QRj]

(Rwn) ← (Rwn) - (QRj)

(n=0-15; j =0,1)

Table 6 : MAC Registers Referenced as ‘CoReg‘

Registers

MSW

MAH

MAS

MAL

MCW

MRW

Description

MAC-Unit Status Word

MAC-Unit Accumulator High

“limited” MAH /signed

MAC-Unit Accumulator Low

MAC-Unit Control Word

MAC-Unit Repeat Word

Address in Opcode

00000b

00001b

00010b

00100b

00101b

00110b

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