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74LVTH16244ADGGRG4 View Datasheet(PDF) - Texas Instruments

Part Name74LVTH16244ADGGRG4 TI
Texas Instruments TI
Description3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS


74LVTH16244ADGGRG4 Datasheet PDF : 19 Pages
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GQL OR ZQL PACKAGE
(TOP VIEW)
123456
A
B
C
D
E
F
G
H
J
K
blk
blk
blk
GRD OR ZRD PACKAGE
(TOP VIEW)
123456
A
B
C
D
E
F
G
H
J
SN54LVTH16244A, SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142T – MAY 1992 – REVISED NOVEMBER 2006
TERMINAL ASSIGNMENTS(1)
(56-Ball GQL/ZQL Package)
1
2
3
4
5
6
A
1OE NC
NC
NC
NC 2OE
B
1Y2 1Y1 GND GND 1A1 1A2
C
1Y4
1Y3
VCC
VCC
1A3
1A4
D
2Y2 2Y1 GND GND 2A1 2A2
E
2Y4 2Y3
2A3 2A4
F
3Y1 3Y2
3A2 3A1
G
3Y3 3Y4 GND GND 3A4 3A3
H
4Y1
4Y2
VCC
VCC
4A2
4A1
J
4Y3 4Y4 GND GND 4A4 4A3
K
4OE NC
NC
NC
NC 3OE
(1) NC – No internal connection
xxxxx
xxxxx
xxxxx
TERMINAL ASSIGNMENTS(1)
(54-Ball GRD/ZRD Package)
1
2
3
4
5
6
A
1Y1
NC
1OE 2OE
NC
1A1
B
1Y3 1Y2
NC
NC
1A2 1A3
C
2Y1
1Y4
VCC
VCC
1A4
2A1
D
2Y3 2Y2 GND GND 2A2 2A3
E
3Y1 2Y4 GND GND 2A4 3A1
F
3Y3 3Y2 GND GND 3A2 3A3
G
4Y1
3Y4
VCC
VCC
3A4
4A1
H
4Y3 4Y2
NC
NC
4A2 4A3
J
4Y4
NC
4OE 3OE
NC
4A4
(1) NC – No internal connection
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DESCRIPTION/ORDERING INFORMATION
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

FEATURES
• Members of the Texas Instruments Widebus™ Family
• State-of-the-Art Advanced BiCMOS
   Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
• Support Mixed-Mode Signal Operation
   (5-V Input and Output Voltages With 3.3-V VCC)
• Support Unregulated Battery Operation Down to 2.7 V
• Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
• Ioff and Power-Up 3-State Support Hot Insertion
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
   – 2000-V Human-Body Model (A114-A)
   – 200-V Machine Model (A115-A)

 

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