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74LVTH16244ADGGRG4 View Datasheet(PDF) - Texas Instruments

Part Name74LVTH16244ADGGRG4 TI
Texas Instruments TI
Description3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADGGRG4 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
SN54LVTH16244A, SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142T – MAY 1992 – REVISED NOVEMBER 2006
www.ti.com
ORDERING INFORMATION
TA
PACKAGE (1)
FBGA – GRD
FBGA – ZRD (Pb-free)
Reel of 1000
SSOP – DL
Tube of 25
Reel of 1000
–40°C to 85°C
TSSOP – DGG
Reel of 2000
TVSOP – DGV
–55°C to 125°C
VFBGA – GQL
VFBGA – ZQL (Pb-free)
CFP – WD
Reel of 2000
Reel of 1000
Tube
ORDERABLE PART NUMBER
SN74LVTH16244AGRDR
SN74LVTH16244AZRDR
SN74LVTH16244ADL
SN74LVTH16244ADLG4
SN74LVTH16244ADLR
74LVTH16244ADLRG4
SN74LVTH16244ADGGR
74LVTH16244ADGGRE4
74LVTH16244ADGGRG4
SN74LVTH16244ADGVR
74LVTH16244ADGVRE4
SN74LVTH16244AGQLR
SN74LVTH16244AZQLR
SNJ54LVTH16244AWD
TOP-SIDE MARKING
LL244A
LVTH16244A
LVTH16244A
LL244A
LL244A
SNJ54LVTH16244AWD
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
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DESCRIPTION/ORDERING INFORMATION
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

FEATURES
• Members of the Texas Instruments Widebus™ Family
• State-of-the-Art Advanced BiCMOS
   Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
• Support Mixed-Mode Signal Operation
   (5-V Input and Output Voltages With 3.3-V VCC)
• Support Unregulated Battery Operation Down to 2.7 V
• Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
• Ioff and Power-Up 3-State Support Hot Insertion
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
   – 2000-V Human-Body Model (A114-A)
   – 200-V Machine Model (A115-A)

 

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