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74LVTH16244ADGGRG4 View Datasheet(PDF) - Texas Instruments

Part Name74LVTH16244ADGGRG4 TI
Texas Instruments TI
Description3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADGGRG4 Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
DL (R-PDSO-G**)
48 PINS SHOWN
0.025 (0,635)
48
1
A
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
PLASTIC SMALL-OUTLINE PACKAGE
0.0135 (0,343)
0.008 (0,203)
25
0.005 (0,13) M
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
24
0°ā8°
0.010 (0,25)
0.040 (1,02)
0.020 (0,51)
0.110 (2,79) MAX
0.008 (0,20) MIN
Seating Plane
0.004 (0,10)
PINS **
28
48
56
DIM
A MAX
0.380 0.630 0.730
(9,65) (16,00) (18,54)
A MIN
0.370 0.620 0.720
(9,40) (15,75) (18,29)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
4040048 / E 12/01
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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DESCRIPTION/ORDERING INFORMATION
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

FEATURES
• Members of the Texas Instruments Widebus™ Family
• State-of-the-Art Advanced BiCMOS
   Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
• Support Mixed-Mode Signal Operation
   (5-V Input and Output Voltages With 3.3-V VCC)
• Support Unregulated Battery Operation Down to 2.7 V
• Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
• Ioff and Power-Up 3-State Support Hot Insertion
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
   – 2000-V Human-Body Model (A114-A)
   – 200-V Machine Model (A115-A)

 

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