PM8315 View Datasheet(PDF) - PMC-Sierra

Part Name

Description

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PM8315

HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER

PMC-Sierra 

STANDARD PRODUCT

DATASHEET

PMC-1981125

ISSUE 7

PM8315 TEMUX

HIGH DENSITY T1/E1 FRAMER WITH

INTEGRATED VT/TU MAPPER AND M13 MUX

• Allows automatic tributary AIS to be activated upon DS2 out of frame.

Synchronous System Interfaces:

• Provides seven 8Mb/s H-MVIP data interfaces for synchronous access to all

the DS0s of all 28 T1 links or all timeslots of all 21 E1s. T1 DS0s are bundled

from four T1 links in sequential order (i.e. 1-4, 5-8, 9-12, 13-16, 17-20, 21-24,

25-28). In normal mode, E1 timeslots are bundled from 4 E1 links in

sequential order (i.e. 1-4, 5-8, 9-12, 13-16, 17-20 and 21 by itself). In G.747

mode, E1 timeslots are bundled from 3 E1 links in sequential order, spaced

by a reserved timeslot on every 4th frame (i.e. 1-3/X, 4-6/X, 7-9/X, 10-12/X,

13-15/X, 16-18/X, 19-21/X).

• Provides seven 8Mb/s H-MVIP interfaces for synchronous access to all

channel associated signaling (CAS) bits for all T1 DS0s or E1 timeslots. The

CAS bits occupy one nibble of every byte on the H-MVIP interfaces and are

repeated over the entire T1 or E1 multi-frame.

• Provides a single 8Mb/s H-MVIP interface for common channel signaling

(CCS) channels as well as V5.1 and V5.2 channels. In T1 mode DS0 24 is

available through this interface. In E1 mode timeslots 15, 16 and 31 are

available through this interface.

• All links accessed via the H-MVIP interface will be synchronously timed to the

common HMVIP clock and frame alignment signals, CMV8MCLK, CMVFP,

CMVFPC.

• H-MVIP access for Channel Associated Signaling is available with the

Scaleable Bandwidth Interconnect bus as an optional replacement for CAS

access over the SBI bus as well as with the H-MVIP data interface. Common

Channel Signaling H-MVIP access is available with the SBI bus, serial PCM

and H-MVIP data interfaces.

• Compatible with H-MVIP PCM backplanes supporting 8.192 Mbit/s.

Scaleable Bandwidth Interconnect (SBI) Bus:

• Provides a high density byte serial interconnect for all framed and unframed

TEMUX links. Utilizes an Add/Drop configuration to asynchronously mutliplex

up to 84 T1s, 63 E1s or 3 DS3s, equivalent to three TEMUXs, with multiple

payload or link layer processors.

• External devices can access unframed DS3, framed unchannelized DS3,

unframed (clear channel) T1s, framed T1s, unframed (clear channel) E1s,

PROPRIETARY AND CONFIDENTIAL

13

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