SST39LF200A-45-4C-B3K View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

View to exact match

SST39LF200A-45-4C-B3K

2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash

Silicon Storage Technology 

Data Sheet

2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash

SST39LF200A / SST39LF400A / SST39LF800A

SST39VF200A / SST39VF400A / SST39VF800A

SIX-BYTE CODE FOR BLOCK-ERASE

TBE

ADDRESS AMS-0

5555 2AAA

5555

5555

2AAA

BAX

CE#

OE#

WE#

TWP

DQ15-0

XXAA XX55

XX80

XXAA

XX55

XX50

SW0

SW1

SW2

SW3

SW4

SW5

Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 16)

BAX = Block Address

AMS = Most significant address

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

X can be VIL or VIH, but no other value.

FIGURE 10: WE# CONTROLLED BLOCK-ERASE TIMING DIAGRAM

1117 F17.9

SIX-BYTE CODE FOR SECTOR-ERASE

TSE

ADDRESS AMS-0

5555 2AAA

5555

5555

2AAA

SAX

CE#

OE#

WE#

TWP

DQ15-0

XXAA XX55

XX80

XXAA

XX55

XX30

SW0

SW1

SW2

SW3

SW4

SW5

Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 16)

SAX = Sector Address

AMS = Most significant address

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

X can be VIL or VIH, but no other value.

FIGURE 11: WE# CONTROLLED SECTOR-ERASE TIMING DIAGRAM

1117 F18.8

©2003 Silicon Storage Technology, Inc.

18

S71117-07-000

11/03

Share Link: