SST39LF200A-45-4C-B3K View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

View to exact match

SST39LF200A-45-4C-B3K

2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash

Silicon Storage Technology 

2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash

SST39LF200A / SST39LF400A / SST39LF800A

SST39VF200A / SST39VF400A / SST39VF800A

Data Sheet

ADDRESS AMS-0

CE#

OE#

TOEH

TCE

TOE

TOES

WE#

DQ6

Note:

TWO READ CYCLES

AMS = Most significant address

WITH SAME OUTPUTS

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

1117 F07.3

FIGURE 8: TOGGLE BIT TIMING DIAGRAM

ADDRESS AMS-0

CE#

SIX-BYTE CODE FOR CHIP-ERASE

5555 2AAA

5555

5555

2AAA

5555

TSCE

OE#

WE#

TWP

DQ15-0

XXAA XX55

XX80

XXAA

XX55

XX10

SW0

SW1

SW2

SW3

SW4

SW5

FIGURE

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 16)

AMS = Most significant address

AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A

X can be VIL or VIH, but no other value.

9: WE# CONTROLLED CHIP-ERASE TIMING DIAGRAM

1117 F08.7

©2003 Silicon Storage Technology, Inc.

17

S71117-07-000

11/03

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