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74AC109 View Datasheet(PDF) - ON Semiconductor

Part Name74AC109 ON-Semiconductor
ON Semiconductor ON-Semiconductor
DescriptionDual JK Positive Edge−Triggered Flip−Flop
74AC109 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
MC74AC109, MC74ACT109
Dual JK Positive
Edge−Triggered Flip−Flop
The MC74AC109/74ACT109 consists of two highspeed
completely independent transition clocked JK flipflops. The clocking
operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flipflop (refer to
MC74AC74/74ACT74 data sheet) by connecting the J and K inputs
together.
Asynchronous Inputs:
LOW input to SD (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes both Q and Q HIGH
Outputs Source/Sink 24 mA
ACT109 Has TTL Compatible Inputs
VCC CD2 J2 K2 CP2 SD2 Q2 Q2
16 15 14 13 12 11 10 9
CD
J
K
CP
SD
Q
Q
CD1
J1
K1
CP1 SD1
Q1
Q1
12345678
CD1 J1 K1 CP1 SD1 Q1 Q1 GND
Figure 1. Pinout; 16Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN
FUNCTION
J1, J2, K1, K2
CP1, CP2
CD1, CD2
SD1, SD2
Q1, Q2, Q1,
Q2
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
http://onsemi.com
16
1
16
1
16
1
DIP16
N SUFFIX
CASE 648
SO16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
16
1
EIAJ16
M SUFFIX
CASE 966
ORDERING INFORMATION
Device
Package
Shipping
MC74AC109N
PDIP16 25 Units/Rail
MC74ACT109N
PDIP16 25 Units/Rail
MC74AC109D
SOIC16 48 Units/Rail
MC74ACT109D
SOIC16 48 Units/Rail
MC74AC109DR2 SOIC16 2500 Tape & Reel
MC74ACT109DR2 SOIC16 2500 Tape & Reel
MC74AC109DT TSSOP16 96 Units/Rail
MC74ACT109DT TSSOP16 96 Units/Rail
MC74AC109DTR2 TSSOP16 2500 Tape & Reel
MC74ACT109DTR2 TSSOP16 2500 Tape & Reel
MC74AC109M
EIAJ16 50 Units/Rail
MC74ACT109M
EIAJ16 50 Units/Rail
MC74AC109MEL EIAJ16 2000 Tape & Reel
MC74ACT109MEL EIAJ16 2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 Rev. 6
Publication Order Number:
MC74AC109/D
Direct download click here

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.
   Asynchronous Inputs:
      LOW input to SD (Set) sets Q to HIGH level
      LOW input to CD (Clear) sets Q to LOW level
      Clear and Set are independent of clock
      Simultaneous LOW on CD and SD makes both Q and Q HIGH

• Outputs Source/Sink 24 mA
• ′ACT109 Has TTL Compatible Inputs

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