LX8584-00CP View Datasheet(PDF) - Microsemi Corporation
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LX8584-00CP Datasheet PDF : 9 Pages
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LX8584x-xx
TM
®
7A Low Dropout Positive Regualtors
PRODUCTION DATA SHEET
APPLICATION NOTE
Overload Recovery (continued)
If this limited current is not sufficient to develop the designed
voltage across the output resistor, the voltage will stabilize at some
lower value, and will never reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage
down to zero in order to make the regulator output voltage return
to regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor
should be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1 at the ripple frequency. The
capacitor value can be determined by using this equation:
C = 1/(6.28 * FR * R1 )
Where: C ≡ the value of the capacitor in Farads; select an
equal or larger standard value.
FR ≡ the ripple frequency in Hz
R1 ≡ the value of resistor R1 in ohms
At a ripple frequency of 120Hz, with R1 = 100Ω
C = 1/(6.28 *120Hz *100Ω) = 13.3µF
The closest equal or larger standard value should be used, in this
case; 15μF.
When an ADJ pin bypass capacitor is used, output ripple
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
M = VOUT /VREF
Where M ≡ a multiplier for the ripple seen when the ADJ
pin is optimally bypassed.
VREF= 1.25V.
For example, if VOUT = 2.5V the output ripple will be:
M = 2.5V / 1.25V = 2
Output ripple will be twice as bad as it would be if the ADJ pin
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8584/84A/84B ICs develop a 1.25V reference voltage
between the output and the adjust terminal (See Figure 2). By
placing a resistor, R1, between these two terminals, a constant
current is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally this current is the specified
minimum load current of 10mA. Because IADJ is very small and
constant when compared with the current through R1, it represents
a small error and can usually be ignored.
LX8584/84A/84B
VIN
IN
OUT
ADJ
VREF
IADJ
50µA
VOUT = VREF
1
+
R2
R1
+ IADJ R2
VOUT
R1
R2
Figure 2 – Basic Adjustable Regulator
LOAD REGULATION
Because the LX8584/84A/84B regulators are three-terminal
devices, it is not possible to provide true remote load sensing.
Load regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the package.
Negative side sensing is a true Kelvin connection, with the
bottom of the output divider returned to the negative side of the
load. Although it may not be immediately obvious, best load
regulation is obtained when the top of the resistor divider, (R1), is
connected directly to the case of the regulator, not to the load.
This is illustrated in Figure 3. If R1 were connected to the load,
the effective resistance between the regulator and the load would
be:
R Peff
=
R
P
*
⎜⎝⎛
R2 + R1
R1
⎟⎠⎞
Where RP
≡
actual parasitic line resistance
When the circuit is connected as shown in Figure 3, the parasitic
resistance appears as its actual value, rather than the higher RPeff.
LX8584/84A/84B
RP
Parasitic
Line Resistance
VIN
IN
OUT
ADJ
Connect
R1 to Case
of Regulator
R1
R2
RL
Connect
R2
to Load
Figure 3 – Connections for Best Load Regulation
Copyright © 1997
Rev. 1.3, 2005-11-11
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
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