IDT5V9885NLGI View Datasheet(PDF) - Integrated Device Technology
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Description
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IDT5V9885NLGI Datasheet PDF : 37 Pages
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IDT5V9885
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
TEST CIRCUITS AND CONDITIONS(1)
VDD
0.1μF
OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
CLKOUT
CLOAD
NOTE:
1. All VDD pins must be tied together.
GND
Test Circuits for DC Outputs
OTHER TERMINATION SCHEME (BLOCK DIAGRAM)
OUTPUTS
GND
CLKOUT
CLOAD
OUTPUTS
GND
CLOAD
CLKOUT
RLOAD
CLOAD
CLKOUT
LVTTL: -15pF for each output
LVDS: - 100Ω between differential outputs with 5pF
OUTPUTS
VDD-2V
CLOAD
RLOAD
CLKOUT
GND
CLOAD
CLKOUT
RLOAD
VDD-2V
LVPECL: - 50Ω to VDD-2V for each output with 5pF
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