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IDT5V9885NLGI View Datasheet(PDF) - Integrated Device Technology

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Description
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IDT5V9885NLGI
IDT
Integrated Device Technology IDT
IDT5V9885NLGI Datasheet PDF : 37 Pages
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IDT5V9885
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
MANUAL FREQUENCY CONTROL (MFC) BLOCK DIAGRAM
PLL0
Prescaler "D"
CONFIG0
CONFIG1
CONFIG2
CONFIG3
VCO
Multiplier "M"
CONFIG0
CONFIG1
CONFIG2
CONFIG3
ODIV
ODIV
ODIV
ODIV
OUTPUT MUX
Output Divider P2
CONFIG0
CONFIG1
ODIV
Output Divider P3
CONFIG0
CONFIG1
PLL1
Prescaler "D"
CONFIG0
CONFIG4
CONFIG5
VCO
Multiplier "M"
CONFIG0
ODIV
CONFIG4
CONFIG5
ODIV
ODIV
ODIV
PLL2
Prescaler "D"
CONFIG0
CONFIG6
CONFIG7
VCO
Multiplier "M"
CONFIG0
ODIV
CONFIG6
CONFIG7
ODIV
ODIV
MFC = 1
NOTES:
This illustration shows how the configurations are arranged for PLL0. Config_4 and Config_5 are taken from PLL1, and Config_6 and Config_7 are taken from PLL2. There is an
ODIV bit associated with each of the four configurations.
- GIN0, GIN1, and GIN2 control eight shaded configurations for PLL0.
- ODIV from each configuration determines the selection of two Output Divider Px Configurations.
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