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FIN1031 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
FIN1031
Fairchild
Fairchild Semiconductor Fairchild
FIN1031 Datasheet PDF : 6 Pages
1 2 3 4 5 6
July 2001
Revised July 2001
FIN1031
3.3V LVDS 4-Bit High Speed Differential Driver
General Description
This quad driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock and data.
The FIN1031 can be paired with its companion receiver,
the FIN1032, or any other Fairchild LVDS receiver.
Features
s Greater than 400Mbs data rate
s 3.3V power supply operation
s 0.4ns maximum differential pulse skew
s 2.0ns maximum propagation delay
s Low power dissipation
s Power OFF protection
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Pin compatible with equivalent RS-422 and LVPECL
devices
s 16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number Package Number
Package Description
FIN1031M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1031MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Function Table
Connection Diagram
Inputs
Outputs
EN
EN
DIN
DOUT+
H
X
H
H
H
X
L
L
H
X
OPEN
L
X
L
H
H
X
L
L
L
X
L
OPEN
L
L
H
X
Z
H = HIGH Logic Level
X = Don’t Care
L = LOW Logic Level
Z = High Impedance
DOUT
L
H
H
L
H
H
Z
Pin Descriptions
Pin Name
Description
DIN1, DIN2, DIN3, DIN4
LVTTL Data Inputs
DOUT1+, DOUT2+, DOUT3+, DOUT4+ Non-Inverting Driver Outputs
DOUT1, DOUT2, DOUT3, DOUT4Inverting Driver Outputs
EN
Driver Enable Pin
EN
VCC
GND
Inverting Driver Enable Pin
Power Supply
Ground
© 2001 Fairchild Semiconductor Corporation DS500507
www.fairchildsemi.com
 

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