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E-ETC5054D-X/HTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
View to exact match
E-ETC5054D-X/HTR
ST-Microelectronics
STMicroelectronics ST-Microelectronics
E-ETC5054D-X/HTR Datasheet PDF : 18 Pages
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ETC5054 - ETC5057
PIN DESCRIPTION
Name
VBB
GNDA
VFRO
VCC
FSR
Pin
Type
*
S
GND
O
S
I
DR
I
BCLKR/CLKSEL I
MCLKR/PDN
I
MCLKX
I
BCLKX
I
DX
O
FSX
I
TSX
O
GSX
O
VFXI
I
VFXI+
I
N° N°
DIP PLCC
and
SO (**)
11
22
33
45
56
67
78
Function
Negative
Power Supply
Analog Ground
Receive Filter
Output
Positive Power
Supply
Receive Frame
Sync Pulse
Receive Data
Input
Shift-in Clock
8 9 Receive Master Clock
9 12 Transmit Master Clock
10 14
Shift-out Clock
11 15
12 16
Transmit
Data Output
Transmit Frame
Sync Pulse
13 17 Transmit Time Slot
14 18
Gain Set
15 19
Inverting Amplifier
Input
16 20 Non-inverting Amplifier
Input
Description
VBB = – 5 V ± 5 %.
All signals are referenced to this pin.
Analog Output of the Receive Filter
VCC = + 5 V ± 5 %.
Enables BCLKR to shift PCM data into DR. FSR is an
8kHz pulse train. See figures 1, 2 and 3 for timing
details.
PCM data is shifted into DR following the FSR leading
edge.
Shifts data into DR after the FSR leading edge. May
vary from 64 kHz to 2.048 MHz. Alternatively, may be
a logic input which selects either 1.536 MHz/1.544
MHz or 2.048 MHz for master clock in synchronous
mode and BCLKX is used for both transmit and receive
directions (see table 1). This input has an internal pull-
up.
Must be 1.536 MHz, 1.544 MHz or 2.048 MHz. May be
asynchronous with MCLKX, but should be
synchronous with MCLKX for best performance. When
MCLKR is connected continuously low, MCLKX is
selected for all internal timing. When MCLKR is
connected continuously high, the device is powered
down.
Must be 1.536 MHz, 1.544 MHz or 2.048 MHz. May be
asynchronous with MCLKR.
Shifts out the PCM data on DX. May vary from 64 kHz
to 2.048 MHz, but must be synchronous with MCLKX.
The TRI-STATE® PCM data output which is enabled
by FSX.
Enables BCLKX to shift out the PCM data on DX. FSX is
an 8 kHz pulse train. See figures 1, 2 and 3 for timing
details.
Open drain output which pulses low during the encoder
time slot. Recommended to be grounded if not used.
Analog output of the transmit input amplifier. Used to
set gain externally.
Inverting Input of the Transmit Input Amplifier.
Non-inverting Input of the Transmit Input Amplifier.
(*) I: Input, O: Output, S: Power Supply
(**) Pins 4,10,11 and 13 are not connected
TRI-STATE® is a trademark of National Semiconductor Corp.
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