ADSP-BF531 View Datasheet(PDF) - Analog Devices
Part Name
Description
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ADSP-BF531 Datasheet PDF : 60 Pages
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ADSP-BF531/ADSP-BF532/ADSP-BF533
SPECIFICATIONS
Component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min Nominal Max Unit
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDEXT External Supply Voltage
VDDEXT External Supply Voltage
VDDRTC Real-Time Clock
Power Supply Voltage
Nonautomotive 400 MHz and 500 MHz speed grade models2
Nonautomotive 533 MHz speed grade models2
600 MHz speed grade models2
Automotive grade models2
Nonautomotive grade models2
Automotive grade models2
Nonautomotive grade models2
0.8 1.2
1.32 V
0.8 1.25
1.375 V
0.8 1.30
1.45 V
0.95 1.2
1.32 V
1.75 1.8/2.5/3.3 3.6 V
2.7 3.3
3.6 V
1.75 1.8/2.5/3.3 3.6 V
VDDRTC Real-Time Clock
Power Supply Voltage
Automotive grade models2
2.7 3.3
3.6 V
VIH High Level Input Voltage3, 4
VIH High Level Input Voltage3, 4
VIHCLKIN High Level Input Voltage5
VIL Low Level Input Voltage3, 6
VIL Low Level Input Voltage3, 6
VDDEXT = 1.85 V
VDDEXT = Maximum
VDDEXT = Maximum
VDDEXT = 1.75 V
VDDEXT = 2.25 V
1.3
3.6 V
2.0
3.6 V
2.2
3.6 V
–0.3
+0.3 V
–0.3
+0.6 V
TJ Junction Temperature
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = 0°C to +70°C 0
+95 °C
TJ Junction Temperature
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = –40°C to +85°C –40
+105 °C
TJ Junction Temperature
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = –40°C to +105°C –40
+125 °C
TJ Junction Temperature
169-Ball Plastic Ball Grid Array (PBGA) @ TAMBIENT = –40°C to +105°C
–40
+125 °C
TJ Junction Temperature
169-Ball Plastic Ball Grid Array (PBGA) @ TAMBIENT = –40°C to +85°C
–40
+105 °C
TJ Junction Temperature
176-Lead Quad Flatpack (LQFP) @ TAMBIENT = –40°C to +85°C
–40
+100 °C
1 The regulator can generate VDDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with–4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance.
2 See Ordering Guide on Page 59.
3 Applies to all input and bidirectional pins except CLKIN.
4 The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are 3.3 V tolerant (always accepts up to 3.6 V maximum VIH), but voltage compliance (on outputs, VOH) depends on
the input VDDEXT, because VOH (maximum) approximately equals VDDEXT (maximum). This 3.3 V tolerance applies to bidirectional pins (DATA15–0, TMR2–0, PF15–0, PPI3–0,
RSCLK1–0, TSCLK1–0, RFS1–0, TFS1–0, MOSI, MISO, SCK) and input only pins (BR, ARDY, PPI_CLK, DR0PRI, DR0SEC, DR1PRI, DR1SEC, RX, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE1–0).
5 Applies to CLKIN pin only.
6 Applies to all input and bidirectional pins.
Rev. E | Page 21 of 60 | July 2007
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