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AD9125BCPZ View Datasheet(PDF) - Analog Devices

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AD9125BCPZ Datasheet PDF : 56 Pages
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AD9125
ANALOG OUTPUTS
TRANSMIT DAC OPERATION
Figure 66 shows a simplified block diagram of the transmit path
DACs. The DAC core consists of a current source array, a switch
core, a digital control logic, and a full-scale output current
control. The DAC full-scale output current (IOUTFS) is nominally
20 mA. The output currents from the IOUT1P/IOUT2P and
IOUT1N/ IOUT2N pins are complementary, meaning that the
sum of the two currents always equals the full-scale current of
the DAC. The digital input code to the DAC determines the
effective differential current delivered to the load.
0.1µF
REFIO
FSADJ
1.2V
5k
I DAC FS ADJUST
REGISTER 0x40
I DAC
CURRENT
SCALING
10k
Q DAC
Q DAC FS ADJUST
REGISTER 0x44
Figure 66. Simplified Block Diagram of DAC Core
IOUT1P
IOUT1N
IOUT2N
IOUT2P
The DAC has a 1.2 V band gap reference with an output impedance
of 5 kΩ. The reference output voltage appears on the REFIO pin.
When using the internal reference, the REFIO pin should be
decoupled to AVSS with a 0.1 μF capacitor. Only use the internal
reference for external circuits that draw dc currents of 2 μA or
less. For dynamic loads or static loads greater than 2 μA, buf-
fer the REFIO pin. If desired, an external reference (between
1.10 V and 1.30 V) can be applied to the REFIO pin. The internal
reference can either be overdriven or powered down by setting
Register 0x43, Bit 5.
A 10 kΩ external resistor, RSET, must be connected from the
FSADJ pin to AVSS. This resistor, along with the reference
control amplifier, sets up the correct internal bias currents for
the DAC. Because the full-scale current is inversely proportional
to this resistor, the tolerance of RSET is reflected in the full-scale
output amplitude.
The full-scale current equation, where the DAC gain is set indi-
vidually for the I and Q DACs in Register 0x40 and Register 0x44,
respectively, follows:
I FS
=
VREF
RSET
×
⎜⎛
72
+
⎜⎝⎛
3
16
× DAC
gain ⎟⎠⎞ ⎟⎠⎞
For nominal values of VREF (1.2 V), RSET (10 kΩ), and DAC gain
(512), the full-scale current of the DAC is typically 20.16 mA.
The DAC full-scale current can be adjusted from 8.66 mA to
31.66 mA by setting the DAC gain code, as shown in Figure 67.
35
30
25
20
15
10
5
0
0
200
400
600
800
1000
DAC GAIN CODE
Figure 67. DAC Full-Scale Current vs. DAC Gain Code
Transmit DAC Transfer Function
The output currents from the IOUT1P/IOUT2P and IOUT1N/
IOUT2N pins are complementary, meaning that the sum of the
two currents always equals the full-scale current of the DAC.
The digital input code to the DAC determines the effective
differential current delivered to the load. IOUT1P/IOUT2P
provide maximum output current when all bits are high. The
output currents vs. DACCODE for the DAC outputs are
expressed as
I OUTP
=
⎢⎣
DACCODE
2N
⎥⎦
×
I
OUTFS
(1)
I OUTN = I OUTFS I OUTP
(2)
where DACCODE = 0 to 2N − 1.
Transmit DAC Output Configurations
The optimum noise and distortion performance of the AD9125
is realized when it is configured for differential operation. The
common-mode error sources of the DAC outputs are significantly
reduced by the common-mode rejection of a transformer or
differential amplifier. These common-mode error sources include
even-order distortion products and noise. The enhancement in
distortion performance becomes more significant as the frequency
content of the reconstructed waveform increases and/or its
amplitude increases. This is due to the first-order cancellation
of various dynamic common-mode distortion mechanisms,
digital feedthrough, and noise.
Rev. 0 | Page 42 of 56
 

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