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74LVTH16373GX View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74LVTH16373GX
Fairchild
Fairchild Semiconductor Fairchild
74LVTH16373GX Datasheet PDF : 8 Pages
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Functional Description
The LVT16373 and LVTH16373 contain sixteen D-type
latches with 3-STATE standard outputs. The device is byte
controlled with each byte functioning identically, but inde-
pendent of the other. Control pins can be shorted together
to obtain full 16-bit operation. The following description
applies to each byte. When the Latch Enable (LEn) input is
HIGH, data on the Dn enters the latches. In this condition
the latches are transparent, i.e, a latch output will change
states each time its D input changes. When LEn is LOW,
Logic Diagrams
the latches store information that was present on the D
inputs a setup time preceding the HIGH-to-LOW transition
of LEn. The 3-STATE standard outputs are controlled by
the Output Enable (OEn) input. When OEn is LOW, the
standard outputs are in the 2-state mode. When OEn is
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the latches.
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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