74LVT574D View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
View to exact match
74LVT574D Datasheet PDF : 16 Pages
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NXP Semiconductors
74LVT574; 74LVTH574
3.3 V octal D-type flip-flop; 3-state
5. Pinning information
5.1 Pinning
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
74LVT574
74LVTH574
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
001aae758
Fig 4. Pin configuration for SO20, and (T)SSOP20
5.2 Pin description
Table 2. Pin description
Symbol
Pin
OE
1
D0 to D7
2, 3, 4, 5, 6, 7, 8, 9
GND
10
CP
11
Q0 to Q7
19, 18, 17, 16, 15, 14, 13, 12
VCC
20
terminal 1
index area
74LVT574
74LVTH574
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND(1)
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
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Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input
Fig 5. Pin configuration for DHVQFN20
Description
output enable input (active LOW)
data input
ground (0 V)
clock pulse input (active rising edge)
data output
supply voltage
74LVT_LVTH574_4
Product data sheet
Rev. 04 — 11 September 2008
© NXP B.V. 2008. All rights reserved.
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