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74LVT32244 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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74LVT32244 Datasheet PDF : 6 Pages
1 2 3 4 5 6
Preliminary
Functional Description
The 74LVT32244 and 74LVTH32244 contain thirty-two
non-inverting buffers with 3-STATE outputs. The device is
nibble (4 bits) controlled with each nibble functioning identi-
cally, but independent of the other. The control pins can be
shorted together to obtain full 32-bit operation. The
Logic Diagrams
3-STATE outputs are controlled by an Output Enable (OEn)
input. When OEn is LOW, the outputs are in the 2-state
mode. When OEn is HIGH, the standard outputs are in the
high impedance mode but this does not interfere with
entering new data into the inputs.
Byte 1
Byte 2
Byte 3
Byte 4
VCC1 is associated with Bytes 1 and 2.
VCC2 is associated with Bytes 3 and 4.
Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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