datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

SST29EE020 View Datasheet(PDF) - Silicon Storage Technology

Part Name
Description
View to exact match
SST29EE020
SST
Silicon Storage Technology SST
SST29EE020 Datasheet PDF : 26 Pages
First Prev 21 22 23 24 25 26
Pin # 1 Identifier
2 Mbit Page-Mode EEPROM
SST29EE020 / SST29LE020 / SST29VE020
Data Sheet
1.05
0.95
.50
BSC
8.10
7.90
.27
.17
18.50
18.30
0.15
0.05
Note:
0.70
0.50
20.20
19.80
1. Complies with JEDEC publication 95 MO-142 BD dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in millimeters (min/max).
3. Coplanarity: 0.1 (±.05) mm.
4. Maximum allowable mold flash is 0.15mm at the package ends, and 0.25mm between leads.
32.TSOP-EH-ILL.4
32-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) 8MM X 20MM
SST PACKAGE CODE: EH
32
CL
Pin #1 Identifier
1
.065
.075
1.645
1.655
.600
.625
.530
.550
7˚
4 PLCS.
.170
Base Plane
.200
Seating Plane
.015
0˚
.050
15˚
.008
.120
.012
.070
.045
.080
.065
.016
.100 BSC
.150
.022
.600 BSC
Note:
1. Complies with JEDEC publication 95 MO-015 AP dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in inches (min/max).
3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches.
32-PIN PLASTIC DUAL-IN-LINE PACKAGE (PDIP)
SST PACKAGE CODE: PH
32.pdipPH-ILL.2
Silicon Storage Technology, Inc. 1171 Sonora Court Sunnyvale, CA 94086 Telephone 408-735-9110 Fax 408-735-9036
www.SuperFlash.com or www.ssti.com
©2001 Silicon Storage Technology, Inc.
26
S71062-06-000 6/01 307
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]