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MT7620 View Datasheet(PDF) - MediaTek Inc

Part NameDescriptionManufacturer
MT7620 Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip MediaTek
MediaTek Inc MediaTek
MT7620 Datasheet PDF : 54 Pages
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MT7620 DATASHEET
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Symbol
tCK(avg)
tAC
tDQSCK
tCH
tCL
tHP
tIS
tIH
tDQSQ
tQH
tRPRE
tRPST
tDQSS
tDQSH
tDQSL
tDSS
tDSH
tWPRE
tWPST
tDS
tDH
Description
Clock cycle time
DQ output access time from SDRAM CLK
DQS output access time from SDRAM CLK
SDRAM CLK high pulse width
SDRAM CLK low pulse width
SDRAM CLK half period
Address and control input setup time
Address and control input hold time
Data skew of DQS and associated DQ
DQ/DQS output hold time from DQS
DQS read preamble
DQS read postamble
DQS rising edge to CK rising edge
DQS input-high pulse width
DQS input-low pulse width
DQS falling edge to SDRAM CLK setup time
DQS falling edge hold time from SDRAM CLK
DQS write preamble
DQS write postamble
DQ and DQM input setup time
DQ and DQM input hold time
Min
Max Unit Remark
5
-
ns
-0.6
0.6
ns
-0.5
0.5
ns
0.48
0.52 tCK(avg)
0.48
0.52 tCK(avg)
Min(tCH,tCL) -
ns
350
-
ps
475
-
ps
-
0.35
ns
tHP-0.45
-
ns
0.9
1.1
tCK
0.4
0.6
tCK
-0.25
0.25 tCK
0.35
-
tCK
0.35
-
tCK
0.2
-
tCK
0.2
-
tCK
0.35
-
tCK
0.4
0.6
tCK
*0.15
-
ns
*0.275
-
ns
Table 3-9 DDR2 SDRAM Interface Diagram Key
NOTE: Depends on slew rate of DQS and DQ/DQM for single ended DQS.
DSMT7620_V.1.3_091212
loginid=yj.huo@z-linkelec.com,time=2012-11-23 11:46:26,ip=14.153.195.177,doctitle=MT7620_Datasheet_20121114.pdf,company=Z-Link Limited 香港瑞聯電子_RLT
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