SAM4CP16B View Datasheet(PDF) - Atmel Corporation

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SAM4CP16B

SMART Power Line Communications Device

Atmel Corporation 

5. Example with the SHDN pin used to control the main regulator enable pin. SHDN defaults to VDDBU at

startup and when the device wakes up from a wake-up event (external pin, RTC alarm, etc). When the

device is in backup mode, SHDN defaults to 0.

6. The NRST pin integrates a permanent pull-up resistor to VDDIO of typical 100 k. When used to control

PLL INIT as in the example, external design should take into account minimizing leakage currents.

5.1.5.4 Wake-up, Anti-tamper and RTCOUT0 Pins

In all power supply figures shown above, if generic wake-up pins other than WKUP0/TMP0 are used either as a wake-up

or a fast startup input, or as anti-tamper inputs, VDDIO must be present. This also applies to the RTCOUT0 pin.

5.1.5.5 General Purpose IO (GPIO) State in Low-power Modes

In dual power supply schemes shown in Figure 5-4, where backup or wait mode has to be used, configuration of the

GPIO lines is kept in the same state as before entering backup or wait mode. Thus, to avoid extra current consumption

on the VDDIO power rail, the user must configure the GPIOs either as an input with pull-up or pull-down enabled, or as

output low or high levels corresponding to the external on-board devices.

5.1.5.6 Default General Purpose IO (GPIO) State after Reset

The reset state of the GPIO lines after reset is given in Table 11-5, “Multiplexing on PIO Controller A (PIOA)”, Table 11-

6, “Multiplexing on PIO Controller B (PIOB)” and Table 11-7, “Multiplexing on PIO Controller C (PIOC)”. For further

details about the General Purpose IO and System lines, wake-up sources and wake-up time, and typical power

consumption in different low-power modes, refer to Table 5-2, “Low-power Mode Configuration Summary”.

SAM4CP [DATASHEET] 18

43051E–ATPL–08/14

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