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UCD90160RGCR View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
UCD90160RGCR 16-Rail Power Supply Sequencer and Monitor with ACPI Support TI
Texas Instruments TI
UCD90160RGCR Datasheet PDF : 56 Pages
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UCD90160
SLVSAC8C – NOVEMBER 2010 – REVISED AUGUST 2017
www.ti.com
MON(1:16)
UCD90160
3.3V
10kW
POWER
SUPPLY
Vout
GPIO(1:16)
/EN VOUT
3.3V
VFB
GPIO
GPIO
“0” or “1”
“0” or “1”
Rmrg_HI
V FB
VOUT
Rmrg_LO
3. 3V
10k W
POWER
SUPPLY
Vout
/EN VOUT
VFB
VFB
Rmrg_HI
VOUT
3.3V
Rmrg_LO
Open Loop Margining
Figure 20. Open-Loop Margining
7.4.14.2 Closed-Loop Margining
Closed-loop margining uses a PWM or FPWM output for each power supply that is being margined. An external
RC network converts the FPWM pulse train into a DC margining voltage. The margining voltage is connected to
the appropriate power-supply feedback node through a resistor. The power-supply output voltage is monitored,
and the margining voltage is controlled by adjusting the PWM duty cycle until the power-supply output voltage
reaches the margin-low and margin-high voltages set by the user. The voltage setting resolutions will be the
same that applies to the voltage measurement resolution (Table 2). The closed loop margining can operate in
several modes (Table 5). Given that this closed-loop system has feed back through the ADC, the closed-loop
margining accuracy will be dominated by the ADC measurement. The relationship between duty cycle and
margined voltage is configurable so that voltage increases when duty cycle increases or decreases. For more
details on configuring the UCD90160 for margining, see the Voltage Margining Using the UCD9012x application
note (SLVA375).
Mode
DISABLE
ENABLE_TRI_STATE
ENABLE_ACTIVE_TRIM
ENABLE_FIXED_DUTY_CYCLE
Table 5. Closed Loop Margining Modes
Description
Margining is disabled.
When not margining, the PWM pin is set to high impedance state.
When not margining, the PWM duty-cycle is continuously adjusted to keep the voltage at
VOUT_COMMAND.
When not margining, the PWM duty-cycle is set to a fixed duty-cycle.
MON(1:16)
UCD90160
GPIO
3.3V
10k W
POWER
Vout
SUPPLY
/EN VOUT
VFB
R1
250 kHz – 1MHz Vmarg
FPWM 1
VFB
R4
R3
C1
Closed Loop
R2
Margining
Figure 21. Closed-Loop Margining
28
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