STA339BWTR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
View to exact match
STA339BWTR
STMicroelectronics
STA339BWTR Datasheet PDF : 78 Pages
| |||
STA339BW
Register description
7.4.7
Zero-detect mute enable
Bit R/W
6
R/W
Table 35. Zero-detect mute enable
RST
Name
Description
1
ZDE
Setting of 1 enables the automatic zero-detect mute
7.4.8
Setting the ZDE bit enables the zero-detect automatic mute. The zero-detect circuit looks at
the data for each processing channel at the output of the crossover (bass management)
filter. If any channel receives 2048 consecutive zero value samples (regardless of fs) then
that individual channel is muted if this function is enabled.
Submix mode enable
Bit R/W
7
R/W
Table 36. Submix mode enable
RST
Name
Description
0
SME
0: Sub Mix into Left/Right disabled
1: Sub Mix into Left/Right enabled
7.5
7.5.1
7.5.2
Configuration register E (addr 0x04)
D7
SVE
1
D6
ZCE
1
D5
DCCV
0
D4
PWMS
0
D3
AME
0
D2
NSBW
0
D1
MPC
1
Max power correction variable
Bit R/W
0
R/W
Table 37. Max power correction variable
RST
Name
Description
0
MPCV
0: Use standard MPC coefficient
1: Use MPCC bits for MPC coefficient
D0
MPCV
0
Max power correction
Bit R/W
1
R/W
Table 38. Max power correction
RST
Name
Description
1
MPC
Setting of 1 enables Power Bridge correction for
THD reduction near maximum power output.
Setting the MPC bit turns on special processing that corrects the STA339BW power device
at high power. This mode should lower the THD+N of a full FFX system at maximum power
output and slightly below. If enabled, MPC is operational in all output modes except tapered
(OM[1,0] = 01) and binary. When OCFG = 00, MPC will not effect channels 3 and 4, the line-
out channels.
DocID15251 Rev 7
37/78
78
|
|
Share Link: