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CAT25C021P-17TE13 View Datasheet(PDF) - Catalyst Semiconductor => Onsemi

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CAT25C021P-17TE13 Datasheet PDF : 12 Pages
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CAT25CXXX
Supervisory Circuits with SPI Serial E2PROM, Precision Reset Controller and Watchdog Timer
FEATURES
s 10 MHz SPI Compatible
s 1.8 to 6.0 Volt Operation
s Hardware and Software Protection
s Zero Standby Current
s Low Power CMOS Technology
s SPI Modes (0,0 &1,1)
s Commercial, Industrial and Automotive
Temperature Ranges
s Active High or Low Reset Outputs
– Precision Power Supply Voltage Monitoring
– 5V, 3.3V, 3V and 1.8V Options
DESCRIPTION
The CAT25CXXX is a single chip solution to three
popular functions of EEPROM Memory, precision reset
controller and watchdog timer. The EEPROM Memory is
a 2K/4K/8K/16K/32K-Bit SPI Serial CMOS E2PROM
internally organized as 256x8/512x8/1024x8/2048x8/
4096x8 bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
2K/4K devices feature a 16-byte page write buffer. The
8K/16K/32K devices feature a 32-byte page write
buffer.The device operates via the SPI bus serial inter-
face and is enabled though a Chip Select (CS). In
s Watchdog Timer on CS
s 1,000,000 Program/Erase Cycles
s 100 Year Data Retention
s Self-Timed Write Cycle
s 8-Pin DIP/SOIC, 16-Pin SOIC and 14-Pin TSSOP
s Page Write Buffer
s Block Write Protection
– Protect 1/4, 1/2 or all of E2PROM Array
s Programmable Watchdog Timer
s Built-in inadvertent Write Protection
– VCC Lock Out
addition to the Chip Select, the clock input (SCK), data
in (SI) and data out (SO) are required to access the
device. The reset function of the 25CXXX protects the
system during brown out and power up/down condtions.
During system failure the watchdog timer feature pro-
tects the microcontroller with a reset signal. The
CAT25CXXX is designed with software and hardware
write protection features including Block Lock protec-
tion. The device is available in 8-pin DIP, 8-pin SOIC, 16-
pin SOIC and 14-pin TSSOP packages.
PIN CONFIGURATION
TSSOP Package (U14)
SOIC Package (S16)
SOIC Package (S)
DIP Package (P)
CS 1
SO 2
NC 3
NC 4
NC 5
WP 6
VSS 7
14 VCC
CS
1
13 RESET/RESET SO 2
12 NC
NC 3
11 NC
10 NC
9 SCK
8 SI
NC 4
NC 5
NC 6
WP 7
VSS 8
16 VCC
CS 1
15 RESET/RESET SO 2
14 NC
WP 3
13 NC
VSS 4
12 NC
11 NC
10 SCK
9 SI
8 VCC
CS 1
7 RESET/RESET SO 2
6 SCK
WP 3
5 SI
VSS 4
8 VCC
7 RESET/RESET
6 SCK
5 SI
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
9-95
 

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