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IDT5V9888 3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR IDT
Integrated Device Technology IDT
IDT5V9888 Datasheet PDF : 37 Pages
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IDT5V9888
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
In order for the save and restore instructions to function properly, the IDT5V9888 must not be in shutdown mode (SHUTDOWN pin asserted). In the event
of an interrupt of some sort such as a power down of the part in the middle of a save or restore operation, the contents to or from the EEPROM will be partially
loaded, and a CRC error will be generated. The CERR bit (0x81) will be asserted to indicate that an error has occurred. The LOSS_LOCK signal will also
be asserted.
On power-up of the IDT5V9888, an automatic restore is performed to load the EEPROM contents into the internal programming registers. The auto-restore
will not function properly if the device is in shutdown mode (SHUTDOWN pin asserted). The IDT5V9888 will be ready to accept a programming instruction once
it acknowledges its 7-bit I2C address.
TCLK
t3
TDI/TMS
tTCLK
t4
t1
t2
tDS tDH
TDO
TRST
NOTE:
t1 = tTCLKLOW
t2 = tTCLKHIGH
t3 = tTCLKFALL
t4 = tTCLKRISE
t5 = tRST (reset pulse width)
t6 = tRSR (reset recovery)
t6
t5
Standard JTAG Timing
TDO
tDO
JTAG
AC ELECTRICAL CHARACTERISTICS
Symbol
tTCLK
tTCLKHIGH
tTCLKLOW
tTCLKRISE
tTCLKFALL
tRST
tRSR
Parameter
JTAG Clock Input Period
JTAG Clock HIGH
JTAG Clock Low
JTAG Clock Rise Time
JTAG Clock Fall Time
JTAG Reset
JTAG Reset Recovery
Min. Max. Units
100
ns
40
ns
40
ns
5(1)
ns
5(1)
ns
50
ns
50
ns
NOTE:
1. Guaranteed by design.
SYSTEM INTERFACE PARAMETERS
Symbol
tDO
tDOH
tDS
tDH
Parameter
Data Output(1)
Data Output Hold(1)
Data Input, tRISE = 3ns
Data Input, tFALL = 3ns
Min. Max. Units
20
ns
0
ns
10
ns
10
ns
NOTE:
1. 50pF loading on external output signals.
25
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