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TAS5704 20-W Stereo Digital Audio Power Amplifier With Feedback TI
Texas Instruments TI
TAS5704 Datasheet PDF : 34 Pages
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SERIAL AUDIO PORTS SLAVE MODE
over recommended operating conditions (unless otherwise noted)
fSCLKIN
tsu1
th1
tsu2
th2
PARAMETER
Frequency, SCLK 32 × fS, 48 × fS, 64 × fS
Setup time, LRCLK to SCLK rising edge
Hold time, LRCLK from SCLK rising edge
Setup time, SDIN to SCLK rising edge
Hold time, SDIN from SCLK rising edge
LRCLK frequency
SCLK duty cycle
LRCLK duty cycle
TEST
CONDITIONS
CL = 30 pF
SCLK rising edges between LRCLK rising edges
t(edge)
LRCLK clock edge with respect to the falling edge of SCLK
TAS5704
SLOS563 – MARCH 2008
MIN
1.024
10
10
10
10
32
40%
40%
32
–1/4
TYP MAX
12.288
48
50%
50%
192
60%
60%
64
1/4
UNIT
MHz
ns
ns
ns
ns
kHz
SCLK
edges
SCLK
period
Figure 1. Slave Mode Serial Data Interface Timing
HARDWARE SELECT PINS
over recommended operating conditions (unless otherwise noted)
PARAMETER
tsu
Setup time, FORMATx, CONFIG_x, GAIN_x to RESET rising edge
MIN TYP MAX UNIT
100
µs
tsu
FORMATx,
CONFIG_x,
GAIN_x,
RESET
Figure 2. Mode Pins Setup Time
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS5704
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