M5-128/104-10VI/1 View Datasheet(PDF) - Lattice Semiconductor

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M5-128/104-10VI/1

Fifth Generation MACH Architecture

Lattice Semiconductor 

initialization values, the VCC rise must be monotonic and the clock must be inactive until the reset

delay time has elapsed.

SECURITY BIT

A programmable security bit is provided on the MACH 5 devices as a deterrent to unauthorized

copying of the array configuration patterns. Once programmed, this bit defeats readback of the

programmed pattern by a device programmer, securing proprietary designs from competitors.

Programming and verification are also defeated by the security bit. The bit can only be reset by

erasing the entire device.

12

MACH 5 Family

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