M38500E5H-FP View Datasheet(PDF) - MITSUBISHI ELECTRIC

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M38500E5H-FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

MITSUBISHI MICROCOMPUTERS

3850 Group (Spec. H)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

000016 Port P0 (P0)

002016 Prescaler 12 (PRE12)

000116 Port P0 direction register (P0D)

002116 Timer 1 (T1)

000216 Port P1 (P1)

002216 Timer 2 (T2)

000316 Port P1 direction register (P1D)

002316 Timer XY mode register (TM)

000416 Port P2 (P2)

002416 Prescaler X (PREX)

000516 Port P2 direction register (P2D)

002516 Timer X (TX)

000616 Port P3 (P3)

002616 Prescaler Y (PREY)

000716 Port P3 direction register (P3D)

000816 Port P4 (P4)

002716 Timer Y (TY)

002816 Timer count source selection register (TCSS)

000916 Port P4 direction register (P4D)

002916

000A16

002A16

000B16

002B16 Reserved ✽

000C16

002C16 Reserved ✽

000D16

002D16 Reserved ✽

000E16

002E16 Reserved ✽

000F16

002F16 Reserved ✽

001016

003016 Reserved ✽

001116

003116 Reserved ✽

001216 Reserved ✽

003216

001316 Reserved ✽

003316

001416 Reserved ✽

003416 A-D control register (ADCON)

001516 Serial I/O2 control register 1 (SIO2CON1)

003516 A-D conversion low-order register (ADL)

001616 Serial I/O2 control register 2 (SIO2CON2)

003616 A-D conversion high-order register (ADH)

001716 Serial I/O2 register (SIO2)

003716 Reserved ✽

001816 Transmit/Receive buffer register (TB/RB)

003816 MISRG

001916 Serial I/O1 status register (SIOSTS)

003916 Watchdog timer control register (WDTCON)

001A16 Serial I/O1 control register (SIOCON)

003A16 Interrupt edge selection register (INTEDGE)

001B16 UART control register (UARTCON)

003B16 CPU mode register (CPUM)

001C16 Baud rate generator (BRG)

001D16 PWM control register (PWMCON)

003C16 Interrupt request register 1 (IREQ1)

003D16 Interrupt request register 2 (IREQ2)

001E16 PWM prescaler (PREPWM)

001F16 PWM register (PWM)

003E16 Interrupt control register 1 (ICON1)

003F16 Interrupt control register 2 (ICON2)

✽ Reserved : Do not write any data to this addresses, because these areas are reserved.

Fig. 9 Memory map of special function register (SFR)

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