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E-L9826TR View Datasheet(PDF) - STMicroelectronics

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E-L9826TR Datasheet PDF : 19 Pages
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L9826
Electrical specifications
Table 6. Electrical characteristics (continued)
Symbol
Parameter
Test condition
Min.
Vclp Output clamp voltage
1 mA Iclp Ioutp; Itest = 10 mA
with correlation
45
RDSon On resistance OUT 1 ... 8
IOUT = 250 mA; Tj = +150 °C
-
COUT Output capacitance
VOUT = 16 V; f = 1 MHz
guaranteed by design
-
Outputs short circuit protection
ISBC Overcurrent shutoff threshold OUT3 ... OUT8
0.45
ILIM Short circuit current limitation OUT1; OUT2
0.5
tSCB Delay shutdown
-
0.2
Diagnostics
VDG Diagnostic threshold voltage -
IOL
Open load detection sink
current
Vout = VDG
tdf
Diagnostic detection filter time
for output 1 & 2 on each
diagnostic condition
Outputs timing
tdon1
Turn ON delay of OUT 1 and 2
NON1, 2 = 50% to VOUT = 0,9·Vbat
NCS = 50% to VOUT = 0,9·Vbat
(VBAT = 16V, RL = 500)
tdon2
Turn ON delay of OUT 3 to 8
NCS = 50% to VOUT = 0,9·Vbat
(VBAT = 16V, RL = 500)
NCS = 50% to VOUT = 0,1·Vbat
tdoff Turn OFF delay of OUT 1 to 8 NON1, 2 = 50% to VOUT = 0,1·Vbat
(VBAT = 16V, RL = 500)
dUon1/dt Turn ON voltage slew-rate
For output 3 to 8; 90% to 30% of
Vbat; RL = 500; Vbat = 16V
dUon2/dt Turn ON voltage slew-rate
For output 1 and 2; 90% to 30%
of Vbat; RL = 500; Vbat = 16V
dUoff1/dt Turn OFF voltage slew-rate
For output 1 to 8; 30% to 90% of
Vbat; RL = 500; Vbat = 16V
dUoff2/dt Turn OFF voltage slew-rate
For output 1 to 8; 30% to 80% of
Vbat; RL = 500; Vbat = 0.9 · Vclp
Serial diagnostic link (load capacitor at SDO = 100 pF)
0.32
·VCC
20
15
-
-
-
0.7
2
2
2
fclk Clock frequency
50 % duty cycle
-
tclh Minimum time CLK = high
-
160
tcll Minimum time CLK = low
-
160
tpcld
Propagation delay CLK to data
at SDO valid
4.9 V VCC 5.1V
-
Typ. Max. Unit
-
62
V
-
3.0
-
300
pF
-
1.1
A
-
1.1
A
3,0
12
s
- 0.4·VCC V
-
100
A
-
50
s
-
5
s
-
10
s
-
10
s
-
3.5 V/s
-
10
V/s
-
10
V/s
-
15
V/s
-
3
MHz
-
-
ns
-
-
ns
-
100
ns
Doc ID 7214 Rev 10
9/19
 

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