STE180N10 View Datasheet(PDF) - STMicroelectronics
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Description
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STE180N10 Datasheet PDF : 8 Pages
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STE180N10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
td(on)
tr
P ar am et e r
Turn-on Delay Time
Rise Time
Qg
Total Gate Charge
Q gs Gat e-Source Charge
Qgd Gat e-Drain Charge
Test Conditions
VDD = 50 V
ID = 90 A
RG = 4.7 Ω
VGS = 10 V
(Resistive Load, see fig. 3)
VDD = 80 V ID = 180 A VGS = 10 V
Min.
Typ.
65
230
485
90
210
Max.
680
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbo l
td(on)
tr
P ar am et e r
Turn-off Delay Time
Fall Time
tr (Voff)
tf
tc
Off-voltage Rise T ime
Fall Time
Cross-over Time
Test Conditions
VDD = 50 V
ID = 90 A
RG = 4.7 Ω
VGS = 10 V
(Resistive Load, see fig. 3)
VDD = 80 V
ID = 180 A
RG = 4.7 Ω
VGS = 10 V
(Induct ive Load, see fig. 5)
Min.
Typ.
280
100
100
170
260
Max.
Unit
ns
ns
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
ISD
ISDM (•)
VSD (∗)
trr
Qrr
I R RM
P ar am et e r
Source-drain Current
Source-drain Current
( pu ls ed)
Forward On Voltage
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
Test Conditions
ISD = 180 A VGS = 0
ISD = 180 A
VDD = 50 V
di/dt = 100 A/µs
Tj = 150 oC
(see test circuit, fig. 5)
Min.
Typ.
Max.
180
540
1.5
250
1875
15
Unit
A
A
V
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
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