SAA7118E View Datasheet(PDF) - Philips Electronics

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SAA7118E

Multistandard video decoder with adaptive comb filter and component video input

Philips Electronics 

Philips Semiconductors

Multistandard video decoder with adaptive

comb filter and component video input

Preliminary specification

SAA7118

8.1.2.2 Luminance path

The rejection of the chrominance components within the

9-bit CVBS or Y input signal is achieved by subtracting the

remodulated chrominance signal from the CVBS input.

The comb filtered CB-CR components are interpolated

(upsampled) by the low-pass 3 block. It’s characteristic is

controlled by LUBW (subaddress 09H, bit 4) to modify the

width of the chrominance ‘notch’ without influencing the

chrominance path. The programmable frequency

characteristics available, in conjunction with the LCBW2

to LCBW0 settings, can be seen in Figs 14 to 17. It should

be noted that these frequency curves are only valid for

Y-comb disabled filter mode (YCOMB = 0). In comb filter

mode the frequency response is flat. The centre frequency

of the notch is automatically adapted to the chosen colour

standard.

The interpolated CB-CR samples are multiplied by two

time-multiplexed subcarrier signals from the subcarrier

generation block 2. This second DTO is locked to the first

subcarrier generator by an increment delay circuit

matched to the processing delay, which is different for PAL

and NTSC standards according to the chosen comb filter

algorithm. The two modulated signals are finally added to

build the remodulated chrominance signal.

The frequency characteristic of the separated luminance

signal can be further modified by the succeeding

luminance filter block. It can be configured as peaking

(resolution enhancement) or low-pass block by LUFI3 to

LUFI0 (subaddress 09H, bits 3 to 0). The 16 resulting

frequency characteristics can be seen in Fig.18. The

LUFI3 to LUFI0 settings can be used as a user

programmable sharpness control.

The luminance filter block also contains the adjustable

Y-delay part; programmable by YDEL2 to YDEL0

(subaddress 11H, bits 2 to 0).

2001 May 30

28

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