22051AKHC View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

View to exact match

22051AKHC

Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit

Fairchild Semiconductor 

PRODUCT SPECIFICATION

TMC22x5yA

Control Register Definitions (continued)

Comb Filter Control (0F)

7

Reserved

6

5

CAT

4

DCES

3

2

IPCF

1

YCCOMP

0

SYNC

Reg Bit

0F 7

0F 6-5

Name

Reserved

CAT

Description

Reserved, set to zero.

Adaption threshold. Fixes threshold at which different comb filters are selected.

0

0 5% of max error

0

1 15% of max error

1

0 25% of max error

1

1 50% of max error

0F 4

DCES

0F 3-2 IPCF

D1 CBCR error signal. When set LOW for D1 chroma comb filters:

a) In 3 line comb filter architectures, the magnitude error between the component

data for that pixel selects the 3 line comb or adapts to a

2 line comb. On a “CB pixel” the error signal selected on pixel (x+4) is sent to

the XLUT with the magnitude difference between “CR pixels” on the same pair

of lines, but from pixel (x+3). Likewise on a “CR pixel” the error signal selected

on pixel (x+5) is sent to the XLUT with the magnitude difference between “CB

pixels” on the same lines but from pixel (x+4).

b) In 2 line comb filters the magnitude differences between the same pair of lines

is always sent to the XLUT, On a “CB pixel” the error from the preceding “CR

pixel” is used and on a “CR pixel” the preceding “CB pixel” would be used.

When set HIGH for D1 chroma filters:

This is used for 3 line comb filter architecture that are inhibited from adapting to 2

line comb filter architectures. The input to the XLUT is the magnitude error in CR

between (0H & 1H) and (1H & 2H) on “CR pixels” and the magnitude error

between (0H & 1H) and (1H & 2H) on “CB pixels”.

Comb filter input select. Selects primary inputs to the comb filter.

IPCF

00

01

10

11

Function

Flat video

LPF output

HPF output

Reserved

0F 1

0F 0

YCCOMP

SYNC

YC or Composite input select. Selects YC inputs when HIGH and composite

inputs when LOW.

Sync processor select. The syncs are obtained by a LPF when HIGH and by the

comb filter when LOW.

Sync Pulse Generator (10)

7

STS7

6

STS6

5

STS5

4

STS4

3

STS3

2

STS2

1

STS1

0

STS0

Reg Bit

10

7-0

Name

STS7-0

Description

Sync to sync 8 lsbs. Bottom 8 bits of the number of pixels between sync

pulses.

REV. 1.0.0 2/4/03

23

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